Hello all! I am new to this website and would like to get some assistance creating a functional circuit. Below are the lab directions:

Overview: Understanding memory
Resources to consult: Digital Electronics: Principles and Applications, 8th Edition, Chapter 11
Instructions:
1. Using the HM6116A120 (2Kx8 ram) create an addressable RAM circuit and perform the following:
2. Choose several address locations (not 0) and write the inverse of the address as data to that location.
a. Address is 0110 Data should be 1001
3. Read the memory in the following order: Read location 0 (this should be 0), Read the first location you wrote to, capture screen data, read the second location you wrote to, capture screen, etc.
4. Describe operation of the circuit. Capture output of seven segment for max, min, and in between values.

I am stuck on step 2a. I have tried a number of different avenues on how to wire it and none of them have been successful. I will show all four avenues I took to accomplish this. Additionally, I did research both the 6116 RAM chip and the 74LS244N buffer. Still at a total loss here.

Layout 1 (General Feedback into the Address Inputs):

Issues: Lights flicker; Read/Write function does not make a difference; No inversion takes place; No real memory takes place.
Operation: Only adjusted the Address Inputs and the WE position to enable Read or Write mode.

Layout 2 (Addition of a Pull-Up Resistors):

Remedies: Removes the flickering.
Issues: Read/Write function appears to be responsive; No inversion takes place; No real memory takes place.
Operation: Adjusted the Address Inputs, Data Outputs, and WE control.

Layout 3 (Removal of Pull-Up Resistors; Addition of Buffers; Addition of Pull-Down Resistor)

Remedies: None.
Issues: No functionality.
Operation: Adjusted Address Inputs, Control Inputs, and Data Outputs.

Layout 4 (Removal of Pull-Down Resistor; Movement of Buffers; Initiating New Outputs):

Remedies: None.
Issues: No functionality.
Operation: Still working this version of the circuit.

Any assistance, advice or even a complete revamp of the circuitry would be greatly appreciated. I'm highly methodical so step-by-step explanations work best for me. I have been at this lab now for about three days and now its mind numbing to look at. Maybe I'm over thinking this project.

 

Welcome to AAC!

There are two write methods. Which are you using?

 

Hello dl324,

I only knew of one write method that will function without High-Z. CS = L, OE = X, WE = L.

 

I only knew of one write method that will function without High-Z. CS = L, OE = X, WE = L.

Describe the order you use to set input data, address, and toggle CS and WE.

How are you inverting the address to write to the SRAM?

 

I am using the table below. Only modes 2 and 4 are usable for this circuit.



The order I intend to use is:
1) Set an address
2) Read the address
3) Invert the address
4) Write the address
5) Read the stored address

I thought by using the buffers I would be able to invert the address.

 

The order of operations isn't detailed enough. You appear to be having problems having a write occur. The device has some specific sequencing requirements to do a write (or read).

You said you read the SRAM datasheet. It gave you some specific signal timings to accomplish a write. This is from an SYC 6116 datasheet:

One show W# going LOW before CS# and the other reverses the order. In both cases, the write is performed when W# goes HIGH.

 

Good morning! As I slept last night I came up with a new logic that might be more productive. Although testing it this morning, I see that I still have the flashing LEDs found in Layout One (above). I used individual inverters and turned my Data Output switch into a Data Input switch.

 

The order of operations isn't detailed enough. You appear to be having problems having a write occur. The device has some specific sequencing requirements to do a write (or read).

You said you read the SRAM datasheet. It gave you some specific signal timings to accomplish a write. This is from an SYC 6116 datasheet:
View attachment 182387
One show W# going LOW before CS# and the other reverses the order. In both cases, the write is performed when W# goes HIGH.

This is the datasheet I found and it contradicts yours:

 

I am using the table below. Only modes 2 and 4 are usable for this circuit.

View attachment 182386

The order I intend to use is:
1) Set an address
2) Read the address
3) Invert the address
4) Write the address
5) Read the stored address

I thought by using the buffers I would be able to invert the address.

74xx244 is non-inverting buffers.

If you want to use inverting buffers, use 74xx240

Allen

 

This is the datasheet I found and it contradicts yours:

This is from a Hitachi datasheet:

 

Good morning! As I slept last night I came up with a new logic that might be more productive. Although testing it this morning, I see that I still have the flashing LEDs found in Layout One (above). I used individual inverters and turned my Data Output switch into a Data Input switch.

View attachment 182390

You can replace the DIP switches and 8 inverters with a 74HC240. And use the OE# to control its outputs between tristate and inverter.

OE# = High (tristate) when reading from RAM
OE# = Low (inverting buffer) when writing to RAM.

Allen

 

The order I intend to use is:
1) Set an address
2) Read the address
3) Invert the address
4) Write the address
5) Read the stored address

Give us the exact sequence you're using to accomplish these steps. In particular, give the sequencing of WE, CS, and OE.