OK sounds pretty solid, mind if I reach out if/when I get around to exploring FPGAs?Lattice Semiconductor CPLD or FPGA:
FAA radar timing controller
Dual-port memory manager bus interface
VXI bus interface
cPCI bus interface and SSD manager
1024 x 4 SIM routing switcher
High-speed synchronous 4-bit 16-port data transfer system
ak
I shifted to FPGA's only because CPLDs were being discontinued. IMnsHO, the CPLD is the world's ultimate logic device, and is the near-perfect hobbyist platform for someone with a little money and even more time. Whenever someone asks about building a clock or event counter or whatever from scratch without a uC, I think CPLD. It is true logic circuit design but without most of those messy wires. The downsides are learning a new schematic editor and acquiring a programmer, so I rarely propose it as a solution. Still, great parts.CPLD is limited as to what it can do, but it is a God send for me.
FPGAs and CLDs are "two sides of the same coin". There is no good reason to start with one or the other. It depends on what you want to do with your designs and you won't know which until you jump in and get some experience. I can say this because there are newer device families which are blending traditionally CPLD or FPGA features together. So, no big deal. For example, FPGA look-up table (LUT) architecture (how the logical elements inside are structured) is combined with internal configuration memory which traditionally is only in CPLDs.So, how could I start with FPGA (skipping CPLDs, right?)
I am affraid of ending reading much more than actually needed. Happened to me in the past, many times.
China takes application notes and copies the circuit. At 1/4 the price.the BangGood board is a steal.
The Delta 4 and Atlas V launch vehicles use FPGAs extensively in their avionics (I designed several boards using them). The Mars rovers Spirit and Opportunity used Xilinx Virtex-II FPGAs. I designed some avionics for a U-2 aircraft upgrade using FPGAs. In 2005 I had the world speed record for gathering 2 MSPS radar data and processing 1024-pt FFTs on the framed data, at 1.2 ms per 512x1024 frame, using Xilinx Virtex-1 class FPGAsI bought a couple of books on this subject about 18 months ago, but barely spent any time. They are intriguing but I'd like hear of any actual projects people here have built that leverage and 'program' their own devices.
Just a point, I did not say entirely.Don't you think that claiming that ALL military and space gear is FPGA-based and, similarly, that ALL of each of those other applications is entirely FPGA-based is going a bit overboard?
FPGAs are deployed in those applications to greater and lesser degrees. In many of those applications they are the exception rather than the rule. For consumer-scale products they are seldom cost effective as they are very expensive in comparison to ASICs once you reach a volume sufficiently large to amortize the mask costs. They are certainly used heavily in developing many of those devices, but the consumer rarely touches a device that has one in it.
Another advantage of FPGAs as far as vitality effectiveness is that FPGA sheets don't need a host PC to run, since they have their own info/yield — we can set aside vitality and cash on the host. This as opposed to GPUs, which speak with a host framework utilizing PCIe or NVLink, and consequently require a host to run.I bought a couple of books on this subject about 18 months ago, but barely spent any time. They are intriguing but I'd like hear of any actual projects people here have built that leverage and 'program' their own devices.
I'll bet your FPGA clone could operate at a much higher clock frequency, too.We build a clone of a TTL processor design to execute some code from the 1970's. Worked like a champ. Inside there was even a duplication of the ALU originally made from 74181's. Another design was a communications microcode processor ending with message masking and matching like they do in a CAN controller. Very powerful stuff when you work with VHDL.
Yes, but there were reasons not to do that to preserve the original timing relationships of various operations. If there was new code to write and run I'm sure we would have done that, but there wasn't so we didn't.I'll bet your FPGA clone could operate at a much higher clock frequency, too.