Phase shift is relative to a given reference.
You cannot measure phase shift of a signal itself.

If you wish to determine the RMS value of a sine wave, you can either measure the signal amplitude or digitize N complete cycles.

 

Then you only need 2 samples per signal period, assuming you know where the peaks are.

You can get these two points by sampling continuously and capturing the min and max values.

 

You can get these two points by sampling continuously and capturing the min and max values.

But sampling continuously is challenging as i have other tasks like RS485 communication, i planned for 20KHz sampling.

 

Phase shift is relative to a given reference.
You cannot measure phase shift of a signal itself.

If you wish to determine the RMS value of a sine wave, you can either measure the signal amplitude or digitize N complete cycles.

Oh, there's lots of tricks to do this. The choice of method hangs on the nature of the input signal, how much precision and accuracy is required, how much data is available, how much processing power one has, and how much time one has to complete a computation. Each method has its own trade-offs.

 

But sampling continuously is challenging as i have other tasks like RS485 communication, i planned for 20KHz sampling.

Use interrupts. This is an easy app.

 

I don't know what CPU/MCU you're using, but there are chips with dedicated hardware that do exactly this -- if you don't want to go the software math route.

 

The requirement is to measure the phase delay introduced by the ADC sensing.

That is in the data sheet of the ADC. What is not known by us is how much delay is in the software.
We don't know what kind of ADC. It might take 12 clocks of the CPU clock.

 

Don't quite understand what you are doing.
Why is the phase-shift of interest?
Are you actually measuring both phase-shift and amplitude of the sinewave?

 

How does such a rough estimate help him to display the "phase shift" on a scope?

By doing precisely what he alluded to, put the original signal on ch1 and the regenerated (ADC-DAC) signal on ch2.

And how does knowing the resolution help?

What harm does it to ask? My personal approach is basically to do a lot of fact finding up front, especially easy questions that entail no effort. The more one knows about his problem space the better I think. Sometime an apparently unimportant detail learned early on can be valuable in unexpected ways, further into the problem.

 

The below is the graphs i came up with, with 50uS delay the phase shift is
360Deg - 0.02 sec => for 50uS it is 0.9Deg is what i get. I plotted in Desmos as below.
After the replies i have come to understanding that the sampling time + conversion time is fixed irrespective of the frequency. And this delay will be fixed even if i use it for further processing.

I basically agree with your analysis.
But as others have already mentioned, since the sampling rate is not phase-locked to the sampled waveform, it may be in your best interest to make the sampling frequency a non-integral multiple of the sampled frequency.
Just my two yen worth of opinion.