Your circuit is alm,ost saturated. Every transistor is different so some will be saturated and some will not be saturated.
Why not design the circuit properly so it works with all 2N3904 transistors?

The circuit uses a 2N3904 NPN transistor but you tested it with a 2N3906 PNP transistor which is completely different.


A single transistor can easily provide a voltage gain of only 100. Bypass the emitter resistor with a capacitor.

Yes indeed I meant I used a 2N3904. Thank you, perhaps you would like a new career picking up my typos? I can promise you plenty of work.



And yes I suggested, way back in this thread to revise the biasing to the middle as normal and reduce the drive, but this bit of the design is not mine it is yours and the OP's.

 

Yes indeed I meant I used a 2N3904. Thank you, perhaps you would like a new career picking up my typos? I can promise you plenty of work.



And yes I suggested, way back in this thread to revise the biasing to the middle as normal and reduce the drive, but this bit of the design is not mine it is yours and the OP's.

Okay, as I'm not really sure how this set-up works, I just toyed around in multisim. I have attatched what seems to get me around the voltage i need. I went over on the emitter resistances to lower the output voltages as they were reading too high.

 

I just toyed around in multisim.

I was hoping you could do more of this but I realise time was short.

I said you would get there.

Well done. Have you got any Msim scope pics as well?

Keep coming back. If your lecturer doesn't dissect this we can do it here if you like.

I have attatched what seems to get me around the voltage i need. I went over on the emitter resistances to lower the output voltages as they were reading too high.

I notice you have emitter bypass capacitors. These increase the gain at ac, so you may not need two stages (both Q1 and Q2) I did not include these caps in my test. Did you not that Ag mentioned this in his reply to me?

A single transistor can easily provide a voltage gain of only 100. Bypass the emitter resistor with a capacitor.

 

Now you need to think about the limiting circuitry.

Do you think to do this at the output or further back?

 

I was hoping you could do more of this but I realise time was short.

I said you would get there.

Well done. Have you got any Msim scope pics as well?

Keep coming back. If your lecturer doesn't dissect this we can do it here if you like.



I notice you have emitter bypass capacitors. These increase the gain at ac, so you may not need two stages (both Q1 and Q2) I did not include these caps in my test. Did you not that Ag mentioned this in his reply to me?

Yeah, I saw that, but due to time limitations, and no real circuit limitations, I figured it'd be easier just to do the extra stage.

As for the limiter, I was planning on doing it at the output.

I'm not sure where to start on the calculations for the cc stage though.

I am going to work on the first (2) circuits. Is there an easy way to figure out the current gain? All my calcs seem easier with β.

 

I seriously recommend looking at the scope views of the waveforma at various stages.

What does the waveform across the speaker look like?

The emitters of Q2 and Q1 can only swing down to -15 and since they are are set to such a low voltage they cannot swing very far down. This is actually one way of limiting the negative swing.

So if you increase the ac drive voltage you will soon see them clipping the negative half cycles of the waveform.

This is why it is recommended to set the base about halfway between the rails.

Since you had already created the circuitry around Q1 & Q2 I assumed you had followed chapters 4,5,6 of your book.

I would be suprised if your book didn't have the complementary CC pair in it.

You can create a limiter with a pair of 'back to back' diodes plus series resistors across any point where the voltage will exceed the diode on voltage (0.6 volts). This is best done at the input to the CC stage. These will then only conduct when the drive exceeds some preset value in either shorting or reducing the drive.

 

I have something similar, just without the resistors before the load. However, it is in a later chapter. I found it just flipping through.

 

Here is the scope shot of my output, looks like i'm clipping a bit. I'll have to figure out why.

 

Okay I have been working through my calculations. Let me know if it looks like I am doing anything wrong thus far.

These calculations are for the two preamps and keep in mind that I'm not really rounding all these numbers as my calculator stores them, I'm just writing short hand:

Measuring in multisim i see that my beta is around 182, with that information I have figured out the DC for the two preamps as follows:
Rinbase=beta RE = 182x 125
The resistance on that section of the circuit will be 1/((1/(182x125))+(1/2.2k)=2.007kohms
So we add the 27k to get about 29.007kohms
I can then take 30V/29.007kohms = 1.034mA
1.034mAx27000 = 27.0245V dropped across R1 leaving about 2.075V for VB
So for IB I can take VB over Rinbase which is going to be 2.075/22.85k=90.82uA
VE= 2.075-.7=1.375
IE=1.375/125-11.004mA
IC=11.004mA-90.82uA=10.913mA
VCE=10.913mAx1500 = 16.3698

Do I need to do DC analysis on the output stage before I can do the AC analysis on the Preamps? As always, thanks for your help.


Brandon

 

I seriously recommend looking at the scope views of the waveforma at various stages.

What does the waveform across the speaker look like?

The emitters of Q2 and Q1 can only swing down to -15 and since they are are set to such a low voltage they cannot swing very far down. This is actually one way of limiting the negative swing.

So if you increase the ac drive voltage you will soon see them clipping the negative half cycles of the waveform.

This is why it is recommended to set the base about halfway between the rails.

Since you had already created the circuitry around Q1 & Q2 I assumed you had followed chapters 4,5,6 of your book.

I would be suprised if your book didn't have the complementary CC pair in it.

You can create a limiter with a pair of 'back to back' diodes plus series resistors across any point where the voltage will exceed the diode on voltage (0.6 volts). This is best done at the input to the CC stage. These will then only conduct when the drive exceeds some preset value in either shorting or reducing the drive.

As far as AC goes, I'm having a hard time figuring out my β for the AC side of the pre-amps and again, all of the calculations I know how to do are based off of beta. once I just figure out how to show that the voltage gain is 10 through calculations i can move on to the output stage and try to figure out that one (which will be the most difficult).

 

Gain = output/input, n'est pas?

When doing calculations there is a difference between analysis and synthesis (=design).
This is common to many applied mathematical disciplines.

This means you do different calculations to analyse something that is already there compared to those you do to design something.

So the calcs I did way back in this thread and the ones you need to do to 'design' the two CE stages are different.
When you design you may have to use a guess and improve it iteratively, because you have less information available.

I wouldn't sweat it too much though because you will come to more sophisticated methods especially for ac analysis.

 

Gain = output/input, n'est pas?

Yeah was getting a very low number though. Like 9 or 10. Where as my DC was like 182. Is that normal?

 

You do not do calculations with typical beta because you don't know if the beta is 100, 200 or if it is 300. Use the minimum spec for beta (100) to calculate the input resistance.

You changed my 150 ohm emitter resistors to 125 ohms which upsets the bias of the preamp transistors a little.

Your circuit produces severe distortion because it has no AC negative feedback.

Most amplifiers are DC-coupled and use DC negative feedback to cancel any DC in the speaker.

My output transistors have a max current rating of 600mA so they will not burn out.
But since the supply voltages are so high then they might get too hot.

 

Beta is current gain, not voltage gain.

The voltage gain of a common-emitter transistor driven from a very low source resistance is the collector resistor in parallel with its load resistor divided by the internal emitter resistance of the transistor in series with the unbypassed emitter resistor.

Why didn't your teacher teach any of this stuff??

 

I did know that beta is current gain. As for the rest, I'm not sure why we haven't learned it yet. :-/ I think this project is a bit above and beyond this class.

I will see if I can change that stuff around but this project is due at 5 and I'm at work right now xD

Do you guys have any ideas of how I can simply reduce the ripple of my power supply?

 

Your power supply uses two 15V voltage regulator ICs. If their input voltage is at least 18V and their output current is 1A or less then their ripple output is almost unmeasurable.
But your schematic does not show the rated voltage and current of the power transformer.

Most audio amplifiers do not use a regulated power supply because their circuit ignors power supply ripple.

 

Your power supply uses two 15V voltage regulator ICs. If their input voltage is at least 18V and their output current is 1A or less then their ripple output is almost unmeasurable.
But your schematic does not show the rated voltage and current of the power transformer.

Most audio amplifiers do not use a regulated power supply because their circuit ignors power supply ripple.

I see. Odd, I had sent my teacher the schematic and he said that I had too much ripple xD

*feels like banging head on wall*

 

I cant check because i'm at work but I think it was a 28V trans

 

A 28V center-tapped transformer produces peak voltages of plus and minus 19.8V. The rectifier bridge causes the 4000uF capacitors (marked wrong at 4mF) to plus and minus 18V which is fine as the inputs to the 15V regulators.

Maybe your teacher thinks your 4mF capacitors are only 4uF.

 

A 28V center-tapped transformer produces peak voltages of plus and minus 19.8V. The rectifier bridge causes the 4000uF capacitors (marked wrong at 4mF) to plus and minus 18V which is fine as the inputs to the 15V regulators.

Maybe your teacher thinks your 4mF capacitors are only 4uF.

I called him and told him it looked fine (after the caps charged of course). He said he would take another look. I was thinking he didn't give the caps time to charge when looking at the ripple.