I would appreciate some advice on this circuit.

I need to detect zero-cross on a 16VAC signal. This circuit shows my attempt at a Schmitt trigger - it simulates fine on LTSpice, but I'm not sure about a few things.

First of all, R21 and R20 are there to limit the voltage at the inverting input to below Vin. However I think I can leave these out as the Linear Technology spec states that "The LT1716 has a unique input stage that can be taken 44V above V–, independent of V+ supply.". -IN won't go more than 24V above ground (with R21 and R20 out of the circuit).

Secondly, the spec says: "(Built-in resistors protect the inputs for faults below the negative supply of up to 5V)". So I thought that I could get rid of the bridge rectifier. With the R21 and R20 voltage divider left in that would limit the -IN voltage to less than +/-5V. However, the LTSpice simulation shows the negative half wave clipped to zero. I don't know if this is an LTSpice error, or if the simulation is correct and the comparator is preventing -IN from going below ground.

What I'm trying to do is to cut down the components as much as possible as I'm very limited on board space. Also, as I will be using SMD components, doing a prototype is a bit tricky: so I would like to be fairly sure I'm right before going down that route.

 

The circuit as drawn will generate a rising edge at the output as the input voltage is falling past 9.5V. This is a long way from the zero crossing. Does that matter to you?

 

It would appear to me that the LTSpice model for an LT part is wrong!

The schematic shows nominally 5k resistors between the input pins and everything else, with the "inboard" ends of the resistors clamped to the negative rail with Schottky diodes. The input bias graph (strangest Y axis I've ever seen!) on page 1 of the datasheet shows input bias current of -1 mA at input voltage of - 5 V with supply of 0 & +5 V. That says it certainly shouldn't be clamping the negative excursion if the attenuator uses the values you've shown. It would also imply you can simply use additional series resistance for larger negative inputs without causing misoperation or harm as long as the actual pin voltage is never taken more negative than 5 volts below the negative supply.

It might be worth an email to Analog. I'd certainly check the product page for the part to see if there might be an updated model.

Quite the unusual part!

If for some reason you wind up deciding the bridge is required, there are dual diodes connected anode to cathode in SOT-23 and probably some of the smaller packages like SC-70 or SOT-523. There are also inexpensive dual transistors in 6-pin versions of a couple of those package, so you could use the base-collector junctions as diodes for 16 VAC. Don't forget you'll get two interrupts per line cycle with the rectifier and only one without.

 

The circuit as drawn will generate a rising edge at the output as the input voltage is falling past 9.5V. This is a long way from the zero crossing. Does that matter to you?

Thanks Albert. No, it doesn't matter because the rising edge will trigger an interrupt on an ESP32 and having a bit of time to process the data is no harm. However at the 9.5V it's too long, so I'll change R2 to 68K, which should give an interrupt at around -IN of .34V (AC signal around 3V). That should give about 400uS to zero cross, which is plenty of time.

Robert

 

Hi Ra5040,
I don't use any emulation software but attached file is a tested zero crossing system.
Generating a pulse on the transition from 0 to +V.
Square input signal if you want a pulse on each zero crossing. ( or use bridge rectifier without a capacitor)
Or take the time between the two zero's and divide by two to find the second one
This allows also to calculate the frequency when needed.

Ignore the PIC circuit. This is only being used to generate a sync ( delayed or ahead pulse to zero).

Input is clamped to vdd with 100K input could save rise to 30Vac no problem.

Picbuster

 

Simplest one with a transistor ....

 

It would appear to me that the LTSpice model for an LT part is wrong!

The schematic shows nominally 5k resistors between the input pins and everything else, with the "inboard" ends of the resistors clamped to the negative rail with Schottky diodes. The input bias graph (strangest Y axis I've ever seen!) on page 1 of the datasheet shows input bias current of -1 mA at input voltage of - 5 V with supply of 0 & +5 V. That says it certainly shouldn't be clamping the negative excursion if the attenuator uses the values you've shown. It would also imply you can simply use additional series resistance for larger negative inputs without causing misoperation or harm as long as the actual pin voltage is never taken more negative than 5 volts below the negative supply.

It might be worth an email to Analog. I'd certainly check the product page for the part to see if there might be an updated model.

Quite the unusual part!

Actually, the problem seems to be me rather than LTSpice. I'm not sure what was wrong, maybe a wire not connected ... but it works OK now.
One odd thing though is that my output is at 2.35V and not 5V ... both with and without the rectifier. I will contact Analog as the LT1716 is a standard model in LTSpice.

I attach the LTSpice models, if you're interested.

If for some reason you wind up deciding the bridge is required, there are dual diodes connected anode to cathode in SOT-23 and probably some of the smaller packages like SC-70 or SOT-523. There are also inexpensive dual transistors in 6-pin versions of a couple of those package, so you could use the base-collector junctions as diodes for 16 VAC. Don't forget you'll get two interrupts per line cycle with the rectifier and only one without.

Using a bridge would be better from a software point of view as the negative output transition on the positive-going half-wave is after the zero-cross, which is no use. So I would have to use a 10ms delay from the +ve going interrupt for the +ve half-wave (which is no big deal admittedly). But it would save one component, so less complexity and less to go wrong, I guess.

I was thinking of a part like this one: http://www.farnell.com/datasheets/1...MZVliDi-SUACiZhpjyyfz-T-bhcOlU6hoCQOAQAvD_BwE

 

hi ra,
Your asc file 'with bridge' is empty , 26 bytes
Eric

I get this with the 'with out' asc file.

 

Hi Ra5040,
I don't use any emulation software but attached file is a tested zero crossing system.
Generating a pulse on the transition from 0 to +V.
Square input signal if you want a pulse on each zero crossing. ( or use bridge rectifier without a capacitor)
Or take the time between the two zero's and divide by two to find the second one
This allows also to calculate the frequency when needed.

Ignore the PIC circuit. This is only being used to generate a sync ( delayed or ahead pulse to zero).

Input is clamped to vdd with 100K input could save rise to 30Vac no problem.

Picbuster

Thank you. I need to digest your circuit a bit (my understanding of analog circuits and components is very basic!).
However, I do want hysteresis in the circuit to make sure I don't get false interrupts due to noise.

 

Simplest one with a transistor ....

View attachment 161768

Thanks. The only thing is that it uses more and larger components (my circuit with the rectifier uses 7 SMD components; the one without the bridge uses 6 SMD components). Also it doesn't have hysteresis.

 

hi ra,
Your asc file 'with bridge' is empty , 26 bytes
Eric
View attachment 161770

Oops! Here it is.

Yes, the simulation with the 'Without bridge" is same as what I'm getting ... which is fine except that the +ve half wave transition is too late (but fixable by software).

What do you think of the 2.4V output? Should it not be near 5V?

 

hi,
I have that running , is the Vout amplitude high enough for a ESP digital input.???
I would increase it to say 4.5v
E

 

The LT1716 has an open drain/collector output, with a internal weak pull up.

The output is specified for a minimum of 5 mA sink and a source current of only 60 μA.

 

In the circuit at #8 I would

• eliminate R4
• raise the value of R5 to at least 30k to keep voltage at inverting input not less than -5 V at negative peak of input; this relying on the internal 5k resistor in series with the input pin
  
• eliminate R2
• raise value of R1 to 100k
• raise value of R3 for desired hysteresis

If the output needs to be inverted

• tie the inverting input directly to ground
• feed the signal to the NII via a high value resistor
• hysteresis resistor still goes to NII

 

morning ebp,
Done those changes as the TS is not online..
Just ask if you want any modifications, no problem.
Eric

 

hi,
I have that running , is the Vout amplitude high enough for a ESP digital input.???
I would increase it to say 4.5v
E

2.4V is probably high enough but I'll change the feedback resistor R3 to 24K or so, which should give an output of around 3.5V, which is certainly high enough. The main thing is to have a fast clean edge for the interrupt.

The LT1716 has an open drain/collector output, with a internal weak pull up.

The output is specified for a minimum of 5 mA sink and a source current of only 60 μA.

I think that should be OK. The weak pull-up isn't too much of a problem because I'm not interested in the low-to high transition. However, I can always turn on the ESP32's internal pull-up resistor. This is where some prototyping is going to be called for!

So here is the likely circuit, with the bridge as a BGX50A. I think the bridge circuit is a better choice than the without-bridge circuit as it only uses one extra component.

 

Sorry, Eric, I was thinking of the version without the bridge. The bridge would need a loading resistor to be sure the output [edit - output of bridge, that is is] was pulled to zero.

 

hi ebp,
That looks better.
E

 

The main thing is to have a fast clean edge for the interrupt.

hi ra,
Does the ESP have the option of High or Low going edge detection for interrupts..?
I use PIC's which have that option.
E

 

hi ebp,
That looks better.
EView attachment 161777

It sure does!