ADR4550 Reference - design advice

Thread Starter

dexm90

Joined Aug 30, 2021
5
Hi All,

I have a doubt about what is the best design practice for the following circuit:
let's assume I want to use the AD4550 as voltage reference for an LDO, what is the best way to make the circuit "calobrable"? For example, after some months the long term drift of the reference is not acceptable anymore, how can you tune it?
My idea is to take a reference with a voltage higher than what i need and then use a resistive divider, in order to be able to tune the resistors in future.. but this adds another soure of drift and may redure the intervals bethween calibrations.

Any application note or advice?

Thank you :)
 

Thread Starter

dexm90

Joined Aug 30, 2021
5
Hi ronsimpson,
I do not have yet a schematic, I am in the really prelimnary phase. for the time being I selected some possible components, and I am oriented to the reference design in the datasheet.
As LDO I will use the LT3045 or the LT3040 (probabily the last one since there is no current reference on chip that can add other sources of drift)
the circuit will be something like that: (from the datasheet)
1630326257656.png
I have 5V available at the input (but this is not a strict requirement), I need 3.3V out, 200mA are enaught.
I do not care too much about the absolute accuracy, but I would like to have my reference very stable, the output voltage should not drift more than 50ppm during the life cycle. At the time bein I am not thinking to implement any temperature stabilization, but maybe I will need (maybe also some temperature cycling at startup to remove the hysteresis.. let's see)
 

ronsimpson

Joined Oct 7, 2019
1,750
Do you know for certain the LTC6655 is the source of the drift? The LT3040 is in a gain of 1 mode so it should be stable but maybe not.

I looked to see how close you are to current limit. Close but probably OK.
I also thought about the about 10mA of ground current from the LT3040 might be effecting the LTC6655. I think the grounds need to be well thought out. Is this on a PCB or a bread board?
 

Thread Starter

dexm90

Joined Aug 30, 2021
5
This is the long term drift from the LTC6655 datasheet:
1630329143059.png
I think it was measured at constant temperature, so in the real life applications, with temperature fluctuations, hysteresis etc may be worst.
In principle it is not a problem if after some 1000s of hours I have to "tune" the circuit, but how? is the idrea of the resistive divider good?

Concerning the others sources of drifts, the opamp in the lt3040 seems to suffer from offset drifts much less compared to the LT3045. I will make a test pcb and will try to evaluate temperature dependance and long term drifts
 

crutschow

Joined Mar 14, 2008
28,484
How would you tweak a resistive divider to a few parts per million resolution?

What is this very stable voltage to be used for?
 

Thread Starter

dexm90

Joined Aug 30, 2021
5
exactly this is my doubt!
I found some very low temperature coefficient resistance (5ppm/C) so with a bit of teperature control it may be feasible.
the idea is to replace the resistors with different values to tune the circuit. The problem is the long term stability of the resistors also, so the interval betwheen the tuning may be very small.

usually how this king of problems are addressed? I did not manage to find any interesting application note
 

ronsimpson

Joined Oct 7, 2019
1,750
What is this very stable voltage to be used for?
I do not know but down that line, maybe the 3.3V powers a micro that could be on a almost unregulated 3.3V and the 3.3V goes to the reference pins on a ADC that needs to be stable. Can you split the 3.3 into two supplies? One stable and one not.
 

Thread Starter

dexm90

Joined Aug 30, 2021
5
yes, it is already splitted, and this is the line that needs to be stable. It will be used to bias a device that needs to be charactezied, so no absolute accuracy required, but the measurement must be reproducible.. this is why I have to limit the drift or be able to trim back the drift after a resonable time interval
 
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