Hello everyone
I am doing a circuit in which I would need to measure some signals with the ADCs of PIC24FJ128GC006. The mcu's supply voltage Vdd is 3.3 V, and I will be measuring two signals, both coming from op amps with dual +-9 V supply. The conditioned signal is in the range of the PIC (0-3.3 V), but occasionally it goes as high as +5 V. Here is a picture:
I need both signals to be in the range 0 - 3.3 V, no matter what spikes will come and be amplified from my analog circuit. As you can see on the green graph, spikes occur in two instances - in the beginning and in the end of the signal (that corresponds to relay and motor switching). You can also see how the green signal goes negative, which should be avoided for obvious reasons. So I was thinking of doing a regular two Schottky diode clamping circuit, but after a little research it proved to be somewhat unreliable - please take a look at this discussion. Both of my signals come out from op amps, so the output impedance is low enough, and I need to keep it below 2.5 KΩ. The spikes will not last more than 100 ms. So if I clamp my circuit with a diode to Vdd, that would inject current in the Vdd rail - the same rail which supplies the PIC. I am using linear voltage regulator, and don't have a lot of load on this rail besides the mcu.
Can someone provide me with a circuit for clamping the voltage, and maybe a little explanation why this works? I would appreciate that. When I asked my tutor what should I do, he said to use the clamp circuit... but I don't want to risk it.
So that's it - I need both positive and negative clamping, and hesitate which way to go. I don't care if I lose a the negative part of the signal, as it is not important. Again, op amp supply is +9/-9 V, and I need the voltage clamped to Vdd 3.3 V.
Thanks a lot!
I am doing a circuit in which I would need to measure some signals with the ADCs of PIC24FJ128GC006. The mcu's supply voltage Vdd is 3.3 V, and I will be measuring two signals, both coming from op amps with dual +-9 V supply. The conditioned signal is in the range of the PIC (0-3.3 V), but occasionally it goes as high as +5 V. Here is a picture:
I need both signals to be in the range 0 - 3.3 V, no matter what spikes will come and be amplified from my analog circuit. As you can see on the green graph, spikes occur in two instances - in the beginning and in the end of the signal (that corresponds to relay and motor switching). You can also see how the green signal goes negative, which should be avoided for obvious reasons. So I was thinking of doing a regular two Schottky diode clamping circuit, but after a little research it proved to be somewhat unreliable - please take a look at this discussion. Both of my signals come out from op amps, so the output impedance is low enough, and I need to keep it below 2.5 KΩ. The spikes will not last more than 100 ms. So if I clamp my circuit with a diode to Vdd, that would inject current in the Vdd rail - the same rail which supplies the PIC. I am using linear voltage regulator, and don't have a lot of load on this rail besides the mcu.
Can someone provide me with a circuit for clamping the voltage, and maybe a little explanation why this works? I would appreciate that. When I asked my tutor what should I do, he said to use the clamp circuit... but I don't want to risk it.
So that's it - I need both positive and negative clamping, and hesitate which way to go. I don't care if I lose a the negative part of the signal, as it is not important. Again, op amp supply is +9/-9 V, and I need the voltage clamped to Vdd 3.3 V.
Thanks a lot!