So I wanted to ask a question regarding this image here:



This was copied from the Linkwitz-Riley site.

I am actually working on the 24/db version of this based on Rod Elliots work over at ESP Sound Products.

I also have been playing around w/ breadboarding a basic buffer, gain and inverting amp setup using a single-ended power supply based on "Professor Flore" here:

.

So far.. I understand all that.

But where I am unsure how to procede is regarding how to "adapt" the single supply topology into the LR filter. In the photo I provide above - the 23R7 and 68nF cap are tied to ground.

So here is my first question: when using the above filter in a single ended supply setup... would I need to create a new voltage divider similar to the video and tie these two points to that? I.E. A single "virtual ground" that all the typical "ground points" within the filter network can tie into?

Or are they left "floating" to infinity by adding a 100uF capacitor between their endpoint and the (-) voltage rail?

-Dean

 

One other question regarding operating these op-amps on single ended supplies...

In that YouTube video, he adds a bypass capacitor between the negative and center point of the voltage divider network. This way, ripples in the (+) VIN are basically filtered out. I understand this completely.

But would it be any better (any advantage) to just stick an LM317 in the path before feeding the op amps? I ask since my final circuit will be an initial input of 30-32 volts. I figured I would just stick an LM317 in there and drop the voltage down to 24 (so plug/minus 12v). My only concern here is that common mode noise rejection would be defeated, no? Because now the negative side/rail is unfiltered while the positive side is clean.

Thoughts?

 

To run on a single supply you need to block DC paths so the opamps can assume their DC operating point at mid-supply so isolating capacitors are needed on input (C5), outputs (C3, C7) and anything referenced back to ground (C4)

 

I figured I would just stick an LM317 in there and drop the voltage down to 24 (so plug/minus 12v).

That does not work. The device defining the midpoint must be able to both source and sink current.

Use an opamp to buffer the virtual ground. This is common practice, and works well as long ad the currents into or out of the virtual ground are within the range of the opamp.

 

To run on a single supply you need to block DC paths so the opamps can assume their DC operating point at mid-supply

The op amps have no Vcc/2 bias voltage, the non inverting inputs are floating as there is no DC path anywhere. Only performing an AC sweep analysis is misleading as it doesn't show that the circuit doesn't really work as expected ;-).

 

Texas Instruments also makes the TLE2426 precision rail splitter, which I am sure that TI could sell boatloads, if it were more budget-friendly priced.

 

To run on a single supply you need to block DC paths so the opamps can assume their DC operating point at mid-supply so isolating capacitors are needed on input (C5), outputs (C3, C7) and anything referenced back to ground (C4)

I'm surprised you posted that circuit, which has no DC paths for both U1's and U2's (+) inputs.

 

Here's the circuit using 1kΩ resistors to generate a virtual ground voltage (vgnd) at 1/2 the supply:

 

So...

First - I am *SO SORRY* about my lack of running simulations... I am actively trying to figure out how the simulations work with KiCad (and trying to understand SPICE itself).

I am still trying to go through online guides regarding that right now. Meanwhile...

I worked out a full version of the schematic as follows:

This is the most complex thing I have ever attempted with KiCad. I normally use perfboard for these types of projects. But since I will be building TWO of these along with a on-delay and a couple other things.. just figured it would be easier to try "doing it the right way".

I still need to add an output buffer to each of the 4 outputs (maybe)... I may not need it with the already high impedance of the tda7498e amp boards I will be using with this circuit. In fact... since those boards already have 20k pots to ground AND in input cap.. I imagine the entire DC blocking network on each output may not even be needed as long as the C-R network does not interfere with the desired bandwidth (I will be testing for that if I ever get the simulations working!)

While I fight with my understanding of KiCad and SPICE.. would anyone care to review this and let me know if I did this correctly? Aside from any possible issues w/ fundamental frequencies, etc.

Also... since I will be powering the tda7498e amp boards from 32-36 volts.. it will be on the high side for these op amps. Any potential issues ahead if I pass the 36V through an LM317 first? Dropping the total VIN to this circuit down to around 18v or 24v?

 

Here's the circuit using 1kΩ resistors to generate a virtual ground voltage (vgnd) at 1/2 the supply:

Can't the left side of C3 be tied to V1 directly?

ak

 

I worked out a full version of the schematic as follows:

Decoupling capacitors for *each* opamp package are critical. In many of their app notes, Analog Devices uses a 0.1 uF ceramic and a 10 uF to 47 uF electrolytic in parallel. These should be as close as possible to the device pins, with the shortest possible leads. The 0.1 uF cap should be the closer of the two.

ak

 

Can't the left side of C3 be tied to V1 directly?

If you want, sure, but I don't see how that makes a significant difference.

 

Decoupling capacitors for *each* opamp package are critical. In many of their app notes, Analog Devices uses a 0.1 uF ceramic and a 10 uF to 47 uF electrolytic in parallel. These should be as close as possible to the device pins, with the shortest possible leads. The 0.1 uF cap should be the closer of the two.

ak

Yup, if you look in the bottom left notes I have in that schematic, I show this.

I like to physically solder a .1u cap directly between each pin on the bottom side of the PCB. Since I don't really do any SMD stuff, everything is old school through hole. I find it easiest to just plop each cap right across the bottom side of each op amps pins.

 

Analog Devices uses a 0.1 uF ceramic and a 10 uF to 47 uF electrolytic in parallel.

Certainly the 0.1µF should be used at each op amp, but I think one common 47µF for all the amps should be fine.

 

Any potential issues ahead if I pass the 36V through an LM317 first?

36V is a little marginal for the LM317, which is rated at 37V max, but that voltage difference only occurs during startup, so should be okay.

 

To run on a single supply you need to block DC paths so the opamps can assume their DC operating point at mid-supply so isolating capacitors are needed on input (C5), outputs (C3, C7) and anything referenced back to ground (C4)

View attachment 351629

You don't have a DC path to ground on the non-inverting inputs.

 

You don't have a DC path to ground on the non-inverting inputs.

The output of the opamp?

If that is not the “DC path to ground”, how does a simple voltage follower work?

 

The output of the opamp?

If that is not the “DC path to ground”, how does a simple voltage follower work?

Do you see a DC path to ground on the non-inverting inputs? If so, show me where.

 

Inverting input -> output-> V- and V+ (internal to opamp) -> ground.

If that is wrong, I don’t see how a voltage follower ever works, since the only connection of the inverting input is to the output.

 

Inverting input -> output-> V- and V+ (internal to opamp) -> ground.

If that is wrong, I don’t see how a voltage follower ever works, since the only connection of the inverting input is to the output.

An op-amp with internal bias resistors? Never seen such a thing. Bias current perhaps, but for a FET input type it is in the femtoamp region.
Simply, voltage followers with no DC bias don’t work. The capacitor will just charge to whichever supply bias current comes from, then they stop working.