Hello!
I have multiple LIS2DS12 accelerometers; according datasheet, it is possible to get data rate high as 3200 and even 6400 Hz. In both cases there are built-in filter with 1420 or 2840 Hz cutt-off frequency. As this accelerometer have internal multiplexer, I can expect a sampling frequency ODR*3 for each channel (X,Y,Z). In all cases build-in filter reject all signal components in range higher then F(sampling)/2.

But, it is way to increase accelerometer bandwidth by using, for example, more then one. In this case they should start with delay. It is look like easy to implement using timer of MCU, especially when accelerometer work in FIFO mode. The frequencies seems to be is not so high to worry about jitters, delays and other stuff. The expected bandwidth should be near ODR*N (N - number of used devices) but LPF of each accelerometers should place constrains on bandwidth too.
But:
1) in my board accelerometers placed rather compact but not in same point. What can I do to solve it?

2) I have a "blind" point at frequency near ODR. For example, if final F(s) should be 12800 Hz for 4 accelerometer, the signal of frequency near 3000...3400 Hz is rejected. It is possible to recover it?

3) Output signal seems to be so noisy, but this may be a consequence of point 1 (placing of accelerometers) which leads to variety of gain.

4) FFT of measured signal seems to have parasitic bins in zone between 3200 to 6400 Hz for F(sampling)=12800 Hz.

What further steps should I do? The goal to archive possibility of analyze spectrum of signal at band above 5kHz.

 

But, it is way to increase accelerometer bandwidth by using, for example, more then one.

No.
The bandwidth is not changed by adding accelerometers.
It's still limited by the bandwidth of each device.

 

No.
The bandwidth is not changed by adding accelerometers.
It's still limited by the bandwidth of each device.

Buy the way, accelerometers start to work is not in same time. The command to start work send in different phases:
τ=(n-1)*T/(M+1),where T - sampling period, n - number of sampling device, M - total number of sampling devices.
The example:
https://zone.ni.com/reference/en-XX/help/370592AB-01/digitizers/timeinterleavedsampling/

But, when input bandwidth limited by LPF, it should be expected that bandwidth of array would be limited. When cutt-off frequency of LPF is near 1/2Fs, it may be not serious. Also, it should works like anti-aliasing filter.

 

τ=(n-1)*T/(M+1),where T - sampling period, n - number of sampling device, M - total number of sampling devices.

There are error here: term M+1 is not correct. So, equation should be
τ=(n-1)*T/M
For example, we have sampling device with Fs = 10. and Ts = 1/10. For time-interleaved system with 2 devices we have:
First device start sampling ->delay at 1/20 -> second device start sampling

 

The command to start work send in different phases:

Makes no significant difference.
You cannot generate a higher bandwidth signal than the sampling rate and anti-alias filter allows.

 

It's possible to interleaved independent ADCs to improve msps but it can only provide a higher sample rate reconstructed signal of the bandwidth limited processed original signal.

http://ww1.microchip.com/downloads/...-PIC32MZ-and-PIC32MK-Families-DS00002785A.pdf

https://www.analog.com/en/analog-di...zing-frequency-response-of-inertial-mems.html