I ran into a situation where an opamp with much better offset voltage gave worse performance in an application where I assume offset voltage is the main factor affecting the performance.

I'm working on a project where I need multiple sawtooth oscillators to track very closely over a range of about 20Hz-4kHz. I was using the LM13700 OTA but when I would tune them close to each other at the low end they would get out of tune at the high end. I decided to try making a discrete OTA to see if I could make the current mirrors more accurate. I changed the output because I don't need it to be bipolar. Making an assumption that the bias current input mirror in the LM13700 was less accurate at one end or the other, I replaced it with an opamp and transistor:



It was still getting out of tune as the frequency went up so I assumed the input offset of the TL074 was causing an issue. I want the tail current to be in the range of 1uA-400uA, so at the low end the offset of the opamp would be significant. I replaced the opamp on the first board with a OPA4196 (25uV typical offset, 100uV max) and the frequency tracking improved quite a bit, but was still just a little off. I then built up a second board using a MAX44243 as the opamp (1uV tyipcal offset, 5uV max), and the tracking is just as bad as with the TL074. The control (CTL) signal is derived as an offset from the -12V net so that the absolute accuracy of the -12V net doesn't matter, and each oscillator gets the same CTL signal.

So am I on the wrong track thinking that the offset voltage of the opamp would be the main factor affecting the frequency matching as it goes up? The bipolar transistors are matched pairs with relatively high gain (200-450) but perhaps they don't function very well at low currents? The output current to the capacitor should be roughly half the tail current, so as low as 0.5uA.

This is the circuit in the LM13700:

 

I ran into a situation where an opamp with much better offset voltage gave worse performance in an application where I assume offset voltage is the main factor affecting the performance.

I'm working on a project where I need multiple sawtooth oscillators to track very closely over a range of about 20Hz-4kHz. I was using the LM13700 OTA but when I would tune them close to each other at the low end they would get out of tune at the high end. I decided to try making a discrete OTA to see if I could make the current mirrors more accurate. I changed the output because I don't need it to be bipolar. Making an assumption that the bias current input mirror in the LM13700 was less accurate at one end or the other, I replaced it with an opamp and transistor:

View attachment 182788

It was still getting out of tune as the frequency went up so I assumed the input offset of the TL074 was causing an issue. I want the tail current to be in the range of 1uA-400uA, so at the low end the offset of the opamp would be significant. I replaced the opamp on the first board with a OPA4196 (25uV typical offset, 100uV max) and the frequency tracking improved quite a bit, but was still just a little off. I then built up a second board using a MAX44243 as the opamp (1uV tyipcal offset, 5uV max), and the tracking is just as bad as with the TL074. The control (CTL) signal is derived as an offset from the -12V net so that the absolute accuracy of the -12V net doesn't matter, and each oscillator gets the same CTL signal.

So am I on the wrong track thinking that the offset voltage of the opamp would be the main factor affecting the frequency matching as it goes up? The bipolar transistors are matched pairs with relatively high gain (200-450) but perhaps they don't function very well at low currents? The output current to the capacitor should be roughly half the tail current, so as low as 0.5uA.

This is the circuit in the LM13700:

View attachment 182789

@Veracohr

The sawtooth waveform is influenced by:
(1) value and constancy of current through Q7B (dependent on all the other BJT's in your current source--of course you have them all mounted to an insulated common heat sink with temperature control, right?).
(2) constancy of current through Q4 (depending on Q4 characteristics, value of R1, value of -12V, input offset voltage of U1A). Unless Q4 has infinite output resistance (i.e. perfect current source), variations in -12V will influence the current source that charges C1.
(3) value, self-inductance, ESR, and dielectric absorption of C1
(4) Ron of Q10, current through Q10 vs its gate drive; it cannot turn fully on in 0.00000000s, so there is variation from device to device, and its drain current vs gate drive is relevant (esp at higher frequencies). Leakage current through Q10 when it's off. Various capacitances, etc. that influence Q10 turn-on and turn-off and the discharge of C1.
(5) Gate drive of Q10...that is dependent on value of R17, +15V, and output characteristic of U3A (slew rate, input vs output delay, voltage swing, gain, output drive constancy among devices, +15V)
(6) and other characteristics of U3A (ratio of R14/R9, input offset of U3A, input bias and offset currents of U3A).
(7) constancy of RESET level during "run"
(8) U1B: input offset voltage, input bias current, speed (slew rate, BW, delay), output drive constancy (among devices)
(9) All stray inductances and capacitances relating to Q7B, C1, Q10, U1B, R9, R14, U3A, power supply and ground. Characteristic of +15V: ripple and other variation in time (e.g. noise, regulation), variation with load, effective impedance.
(10) Although you have not shown it, I assume you are powering U1 and U3 between +15V and -12V, with each device having appropriate bypass caps to ground located close to the power pins and close to the ground connections to C1 and Q10.
(11) Of course, all the above apply to your other oscillators as well.

Of course, you have not given any indication of the magnitude of error you see, etc. How stable operation of one oscillator is after you "tune" it and then test it again later. Nor have you indicated how you tune (via BIAS, N1, ...?) each oscillator...and how stable your tuning method is.

Now, the question is: Why would you expect identical tracking between different oscillators?
(Edit)
In retrospect my reply is too sarcastic. What I was aiming for was to highlight how many variables are present. I wonder why you settled on TL074 input offset as the major culprit. It would help us to know just how close you are expecting multiple oscillators to track (vs CTL?) and what tracking errors you are seeing. With so many error sources, I suggest that a methodical investigation is needed to identify what is/are the major sources of variation and then attempt to minimize those.

If you can use a circuit simulator (e.g. LTspice), that could be very useful in visualizing how sensitive your circuit is to variations in each component.

 

@Veracohr

The sawtooth waveform is influenced by:
(1) value and constancy of current through Q7B (dependent on all the other BJT's in your current source--of course you have them all mounted to an insulated common heat sink with temperature control, right?).
(2) constancy of current through Q4 (depending on Q4 characteristics, value of R1, value of -12V, input offset voltage of U1A). Unless Q4 has infinite output resistance (i.e. perfect current source), variations in -12V will influence the current source that charges C1.
(3) value, self-inductance, ESR, and dielectric absorption of C1
(4) Ron of Q10, current through Q10 vs its gate drive; it cannot turn fully on in 0.00000000s, so there is variation from device to device, and its drain current vs gate drive is relevant (esp at higher frequencies). Leakage current through Q10 when it's off. Various capacitances, etc. that influence Q10 turn-on and turn-off and the discharge of C1.
(5) Gate drive of Q10...that is dependent on value of R17, +15V, and output characteristic of U3A (slew rate, input vs output delay, voltage swing, gain, output drive constancy among devices, +15V)
(6) and other characteristics of U3A (ratio of R14/R9, input offset of U3A, input bias and offset currents of U3A).
(7) constancy of RESET level during "run"
(8) U1B: input offset voltage, input bias current, speed (slew rate, BW, delay), output drive constancy (among devices)
(9) All stray inductances and capacitances relating to Q7B, C1, Q10, U1B, R9, R14, U3A, power supply and ground. Characteristic of +15V: ripple and other variation in time (e.g. noise, regulation), variation with load, effective impedance.
(10) Although you have not shown it, I assume you are powering U1 and U3 between +15V and -12V, with each device having appropriate bypass caps to ground located close to the power pins and close to the ground connections to C1 and Q10.
(11) Of course, all the above apply to your other oscillators as well.

Of course, you have not given any indication of the magnitude of error you see, etc. How stable operation of one oscillator is after you "tune" it and then test it again later. Nor have you indicated how you tune (via BIAS, N1, ...?) each oscillator...and how stable your tuning method is.

Now, the question is: Why would you expect identical tracking between different oscillators?
(Edit)
In retrospect my reply is too sarcastic. What I was aiming for was to highlight how many variables are present. I wonder why you settled on TL074 input offset as the major culprit. It would help us to know just how close you are expecting multiple oscillators to track (vs CTL?) and what tracking errors you are seeing. With so many error sources, I suggest that a methodical investigation is needed to identify what is/are the major sources of variation and then attempt to minimize those.

If you can use a circuit simulator (e.g. LTspice), that could be very useful in visualizing how sensitive your circuit is to variations in each component.

The circuit with the OPA4196 had about 0.6% deviation between ~76Hz and 3.26kHz. I tuned them together at 76Hz then swept the frequency up. The MAX44243 board had about 3.57% deviation over roughly the same frequencies.

I changed the comparator pullup resistor to 10k on both boards and the MAX44243 board improved to about 1% deviation. The OPA4196 didn't change.

I was trying to simulate the effect of Rds-on of the discharge FET but I was getting slight frequency differences, or perhaps random fluctuations, even with two identical circuits in the simulation, so I gave up on that. I tried swapping out the 2N7002 with a NX3008NBK (lower Rds-on) on the MAX44243 board (not sure why I used two different models in the first place) and it improved again to 0.56%.

If I could get them to keep within 0.1% over the frequency range of interest I'd be happy. The frequency isn't exactly stable but I was just trying to figure out the tracking problem first.

Nothing is mounted on a heat sink. The matched pairs dissipate milliwatts at most, plus are small SMT parts that don't really lend themselves to heat sinks.

I mentioned that the CTL signal is an offset from -12V. The power rails are +/-15V, so I used -12V at the lower end of the current-setting resistor so the opamp wouldn't have to try to get too close to the negative rail. The CTL signal comes from this:



Where 12V_ADD ranges from 0V to -10V. Therefore the -12V signal (which is just a buffered voltage divider) might move around a little, but the voltage across the resistor should be steady based on CTL being derived from -12V.

Now I'm wondering if the reset circuit (FET choice, drive signal) might have been a big part of the issue when I was using the LM13700. It would be simpler if I could go back to using that.

 

The circuit with the OPA4196 had about 0.6% deviation between ~76Hz and 3.26kHz. I tuned them together at 76Hz then swept the frequency up. The MAX44243 board had about 3.57% deviation over roughly the same frequencies.

I changed the comparator pullup resistor to 10k on both boards and the MAX44243 board improved to about 1% deviation. The OPA4196 didn't change.

I was trying to simulate the effect of Rds-on of the discharge FET but I was getting slight frequency differences, or perhaps random fluctuations, even with two identical circuits in the simulation, so I gave up on that. I tried swapping out the 2N7002 with a NX3008NBK (lower Rds-on) on the MAX44243 board (not sure why I used two different models in the first place) and it improved again to 0.56%.

If I could get them to keep within 0.1% over the frequency range of interest I'd be happy. The frequency isn't exactly stable but I was just trying to figure out the tracking problem first.

Nothing is mounted on a heat sink. The matched pairs dissipate milliwatts at most, plus are small SMT parts that don't really lend themselves to heat sinks.

I mentioned that the CTL signal is an offset from -12V. The power rails are +/-15V, so I used -12V at the lower end of the current-setting resistor so the opamp wouldn't have to try to get too close to the negative rail. The CTL signal comes from this:

View attachment 182896

Where 12V_ADD ranges from 0V to -10V. Therefore the -12V signal (which is just a buffered voltage divider) might move around a little, but the voltage across the resistor should be steady based on CTL being derived from -12V.

Now I'm wondering if the reset circuit (FET choice, drive signal) might have been a big part of the issue when I was using the LM13700. It would be simpler if I could go back to using that.

@Veracohr
OK, let's try to work through this methodically. Starting with creating the CTL signal via the schematic you have just added (thank you).

Creating CTL
*Q(uestion or observation)1: Where does -12V come from? How do we know it is sufficiently stable?
*Q2: Where does 0 to -10V for 12V_ADD come from? (I will assume that all voltages are referenced to the same ground that appears at the bottom of C1.
*Q3: How stable are R3, R5, R6, R8?
*Q4: When 12V_ADD=0.0000V (assumed relative to ground as noted above), then U2B:5=-6.0V(nominal) and U2B:6=-6V(nominal, ignoring input offset of U2B). Thus U2B:7(CTL)= -12.0V (nominal). But resistor tolerances (and tempco's) and U2B input offset could easily make CTL < -12V (i.e. more negative than -12).
*Q5: When 12V_ADD=-10.0000V...(U2B:5 still =-6.0V)...then U2B:7(CTL)=-2.0V(nominal). Same tolerances apply as for Q4.
*Q6: Thus, CTL ranges (nominally, ignoring tolerances & input offset) from -12V to -2V.
*Q7: TL074C output swing is guaranteed to -12V when using +/-15V supplies. Risky.
Have I made any errors above?

CTL to Q4 current:
*Q8: CTL varies from -2V to -12V (see Q6)
*Q9: U1A output can swing from -12V to +12V; should be sufficient to turn Q4 fully off and on.
*Q10: Ignoring tolerances on CTL and input offset of U1A, Q4:2 can range from -12V to -2V. Considering offsets & tolerances, U1A:2 could be (slightly) more negative than -12V to which R1, current sense resistor, is connected. Risky. Tolerance & tempco of R1 relevant.
*Q11: Assuming U1A has sufficient gain (likely) and Q4 sufficient transconductance (likely), Q4 drain current will be directly proportional to voltage across R1.
Have I made any errors above?

I'll continue with the BJT current mirror next. However, I am curious why you chose to use a mirror rather than creating a current source (via P-ch MOSFET) from the +15V rail. Is there a reason why CTL relative to +15V could not be used? Perhaps you can explain what BIAS and N1 are, to help understand your approach?

However, now time for a break (1:30AM here) till tomorrow sometime. Please offer comments/corrections/challenges whenever.

 

The -12V comes from a voltage divider buffered by an opamp. It's one section of U2 (still TL074) so I see a potential problem in the common mode input range and output swing. However, when I changed U1 on the first board from TL074 to OPA4196 the tracking problem improved significantly, so U2 isn't likely the cause of that.

12V_ADD comes from a linear to exponential converter going into a current mirror. It's a little convoluted but it enables the 0V to -10V:





It's actually -10mV to -10V I'm going for, for a tail current of 1uA to 1mA. When I was using the LM13700, the output from Q13 was used directly as the bias current input. Now that I'm trying to use voltage control of the current, I needed the mirror to get the voltage based on GND.

I'm using the current mirror Q6-Q7 because the whole idea for the project requires two controls for the frequency, and thus the differential pair. The main control is the tail current which covers the full frequency range needed. The BIAS-N1 differential is the other control and is used for small offsets. The ultimate goal is eight oscillators, seven of which can be in tune or offset in frequency relative to the eighth. The N1 (and corresponding N2 on this two-oscillator test board) comes from this:

 

The -12V comes from a voltage divider buffered by an opamp. It's one section of U2 (still TL074) so I see a potential problem in the common mode input range and output swing. However, when I changed U1 on the first board from TL074 to OPA4196 the tracking problem improved significantly, so U2 isn't likely the cause of that.

12V_ADD comes from a linear to exponential converter going into a current mirror. It's a little convoluted but it enables the 0V to -10V:


View attachment 182956


It's actually -10mV to -10V I'm going for, for a tail current of 1uA to 1mA. When I was using the LM13700, the output from Q13 was used directly as the bias current input. Now that I'm trying to use voltage control of the current, I needed the mirror to get the voltage based on GND.

I'm using the current mirror Q6-Q7 because the whole idea for the project requires two controls for the frequency, and thus the differential pair. The main control is the tail current which covers the full frequency range needed. The BIAS-N1 differential is the other control and is used for small offsets. The ultimate goal is eight oscillators, seven of which can be in tune or offset in frequency relative to the eighth. The N1 (and corresponding N2 on this two-oscillator test board) comes from this:

View attachment 182957

@Veracohr
Thanks for the additional info. I have skimmed, but not digested, all that you say about the current mirror, BIAS, etc. You have not yet divulged the sources of the ±15V and how stable/noise-free they are; will all oscillators share a common ±15V source? Can I assume that U1 and U3 power is well bypassed with low ESR capacitors with short leads, ultimately connecting to C1's ground?

It seems to me that:
1. You would like for each oscillator (frequency) to be independently linear vs CTL within ±0.1%. Failing that, you might accept greater nonlinearity if all oscillators tracked one "master oscillator" within ±0.1%.
2. The linearity issue can perhaps be broken into two parts. (a) Is the current for charging C1 linear vs CTL (for all oscillators)? and (b) if a known variable current were provided to charge C1, would the sawtooth generator frequency be linear vs that current?

Therefore, I propose that we try to determine first whether the sawtooth generator itself is sufficiently linear. That would imply having a source of accurately known, stable, and controllable current to charge C1. That current could come via the current mirror circuitry or something else we contrive; in any case we need to know precisely, for a number of test currents (within the current range you actually plan to use), what is the charging current and what frequency results. Do you have equipment that can measure voltage or current or resistance or frequency within better than your 0.1% goal? For (a simplest) example, could we substitute various resistors from a stable positive voltage reference to set a charging current (not strictly a current source but okay for testing)? During the tests, RESET must be held to a fixed value and monitored to guarantee its stability. [And I must now belatedly ask whether the sawtooth generator is free-running during your tests or do your tests encompass a startup from RESET as part of the tests? Perhaps we need to run both configurations?] Do you have suggestions for performing the test I have described?

Unfortunately, such testing will reveal only whether or not the specific components used can create a linear oscillator. They will not reveal how much variation will result from using a different set of components (U1, U3, R9, R14, R17, Q10, C1) with the variation inherent among components. It is possible that Spice simulation can help to see what effect expected variations might have. I would expect that even if a linear oscillator results, the scale factor (Icharge vs Frequency) will differ with different components. Your control of charging current (i.e. the mirror circuitry, etc) may allow the scaling error to be calibrated out.

Comments? (If you tire of my approach, you can of course follow any scheme you wish.)

Addendum: One approach to the test would be to temporarily disable Q10 (tie U3A:1 to -15V) and place a known resistance in parallel with C1; measuring the voltage across the resistor would yield the current. This assumes that the current mirror circuitry is sufficiently stable for the test to be interrupted multiple times for a current measurement.