the design is fundamentally flawed and the device, as you described, is working properly.Here is the diagram
https://www.google.com.lb/search?q=...hXijlQKHe_IAKYQ_AUIBygB#imgrc=T-kBF24ovoGfVM:
It's the third photo
Your expectation of it is wrong.
the design is fundamentally flawed and the device, as you described, is working properly.Here is the diagram
https://www.google.com.lb/search?q=...hXijlQKHe_IAKYQ_AUIBygB#imgrc=T-kBF24ovoGfVM:
It's the third photo

Actually, if you look at the recommended conditions in the datasheet in post #22, the range for a logic low input is 0 V to 0.8 V, not 0.4 V. 0.4 V is just a point within the range that got specified in detail. The current coming out of the input pin is not supplied by a current source, so it almost certainly is less than -1.6 mA at 0.8 V. But the standard assumption that it is 1.6 mA builds a little safety margin into the calculations. Hence, 500 ohms max.For 7400 series gate,
VIL = 0.4V
IIL = 1.6mA
Rpulldown = VIL/IIL = 0.4V/0.0016A = 250Ω
This is the max value. A resistance from 100Ω to 220Ω is appropriate. Better to use 100Ω for reliability.
What software makes these breadboard images?From that article, note the text above the diagram. It would work with a '4011 though the logic is inverted. Do you think he changed the chip at some point?
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Below is the breadboard schematic version of the above circuit so that you can see the exact wiring of the circuit to the 4011 chip.
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http://fritzing.org/home/What software makes these breadboard images?