I'm a newbie here and very rusty on electronic circuit design and theory so please bear with me!

I think i found what I was looking for in this thread (Wendy's second post): https://forum.allaboutcircuits.com/threads/variable-time-delay-using-555-timer.11593/.

I think what it is saying is the frequency is set by the first stage timer with the variable resistor and the polarised capacitor using the equation given. In this case I have selected 10Kohm and 0.01uF for a frequency of 7KHz.

What I am unclear about is how the second stage works. It appears that the capacitor/resistor arrangement creates an oscillator circuit but the capacitor is blocking DC so I don't understand how it creates an identical square waveform (with the shift). Can someone explain in simple (dummy) terms how this works?

Also, assuming it does work do i use the same t=RC equation to calculate the time delay required for the 90º phase shift?

thanks for your help!

Catriona.