At the risk to dragging this conversation a little bit off track:
The '4081 is an AND gate. The doide circuit is the post above is an OR gate.

Above is a diode AND gate.

Remaining questions:
Is pin 7 connected to ground?

What are pins 1 & 2 connected to?

When the gate is misbehaving, what are the voltages on pins 1 and 2?

 

At the risk to dragging this conversation a little bit off track:
The '4081 is an AND gate. The doide circuit is the post above is an OR gate.
View attachment 246980
Above is a diode AND gate.

Remaining questions:
Is pin 7 connected to ground?

What are pins 1 & 2 connected to?

When the gate is misbehaving, what are the voltages on pins 1 and 2?

Hi mate,

I didnt specifically address your post as the answers were contained in other posts. You are correct that I need an AND gate, nat an OR gate. I am only a hobby level electronics person and as such many answers may go beyond my understanding so please bare with me.

But to your specific questions. 7 to ground. 1 and 2 the normally open outputs of the 2 identical radar units. The closed outputs of the radar units are 12V supply. Currently the inputs to the 3 other AND gates are not connected to anything.

I noted the output to the alert (an LED strobe) was very poor output so I will incorporate a solid state relay triggered by pin 3 to send battery voltage to the strobe.

 

(Some text removed for clarity)
But to your specific questions. 7 to ground. 1 and 2 the normally open outputs of the 2 identical radar units.

I hope I read that wrong. Somewhere in this thread, I thought I saw somebody remind you to never leave an CMOS input floating. Each input must driven by an actively pulled up or down output. or connected or pulled up to Vdd through a resistor or connected to pulled down to Vss through a resistor. The inputs can also be tied directly to Vdd or Vss.

 

when the relay switches and the output goes high wont that track to ground instead of going through the gate?

No.
What makes you think that?

The resistor to ground is to provide solid zero voltage (logic 0) when the relay is open, which an open-circuit does not do. An open-circuit voltage can float to any value.
When the relay output goes high, it will drive the voltage across the resistor high, giving a logic 1 at the gate input.

 

Hi guys,

I can report that by adding the 10k resistors the circuit works succesfully. Thankyou all for your valued input!

I am wondering though if I can delete the 6 other resistors from the 3 other gates not being used? It seems like a waste of components given the gates are independent of each other?

Cheers

 

INPUTS to CMOS gates that are not used can be tied directly to low or high. Unlike TTL they do not need current limiting resistors. CMOS inputs only carry the current to charge the gate capacitance, which is not much, plus that leakage current, which is very very low.