So again, I'm reading a document that is relevant to my project, and I am once again confused The section is discussing clock correction between the transmitter and receiver, basically adding idle symbols to the data stream, which will be kept or thrown away at the reciever to avoid fifo over or under flows. It says this:

The tight jitter requirements on a transmit clock normally prevent a Gigabit SERDES from using a
recovered clock as a transmit clock. Each PCB assembly has a unique oscillator and a unique frequency.​

If the two oscillators are just 1 PPM off frequency from each other at 1 GHz, and we supply a 1/20

th

rate reference clock, clock one of the streams will be faster or slower 20,000 times per second. Hence,​

in an 8b/10b encoded system there would be twenty thousand extra or missing symbols every second.
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But wait! This is a 10Gbit/sec serial line, so the rate is 10GBPS, or 10*reference clock (1GHZ) bits/sec. They are telling me the over and under flow is 20,000 SYMBOLS/sec. According to my calculations, that should be 20,000 Bits/sec or 2,000 symbols/sec (we're talking 10bit symbols for 8b/10b encoding)​

Here is the document: http://www.xilinx.com/publications/archives/books/serialio.pdf​

It's a long document, so don't bother if you don't have the time. I'll figure it out sooner or later.​

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I am not sure how robust the 8/10 encoding is, but any way I think it could mean that 20,000 times a second you somehow lose one symbol - you either get a different one or have the symbol discarded as corrupted.
..or the author screwed up and meant 2000 a second.

Either way thanks for a nice document, I will have to find some time to read it whole.