1. T

    Analog CMOS IC layout: DRC, DFM, DFR

    Regarding CMOS analog IC layout, what are differences between DRC, DFM and DFR? What I understood during research: - DRC (Design Rule Check) checks if a laid out block follows technology rules what ensures dimensional precision and electrical parameters - DFM (Design For Manufacturing)...
  2. F

    EAGLE: Change shape of Repour All Polygon

    Hi, As you can see from the attached picture, I used some polygon area on the top side. Anyway, the surface has some empty zone close to pad that I would like to fill with copper. Do you know how to do that? Thank you.
  3. shanekent

    Do you need a PCB designer to help with a project?

    Hello! If you need a PCB designer to help you with one of your projects, then I may be able to help! I'm offering my services at a low cost at the moment, so hopefully this proposition is interesting! I've been in the electronics industry for approximately 3-years at this point and over that...
  4. J

    How to adjust PCIE signals using Hyperlynx S- Parameter report?

    Dear All, I’m using Hyperlynx (MentorGraphic) for Signal Integrity test for PCIE GEN 1 Tx Rx & Clk signals. I imported Altium designed layout file to Hyperlynx. This signals (Tx, Rx, Clk) don’t pass S – Parameters when I run Serdes Batch Wizard. But it pass Channel Verification. 1) What are...