Hello,
I am new to VHDL and am trying to adapt code from https://github.com/skiselev/tiny_z80/tree/master/CPLD
to implement memory paging registers for a Z80 board (with a Xilinx CPLD XC9572XL-10VQ64C).
Paging registers should provide 4 banks of 16Kb (in Z80 address space), mapping 512Kb...
I'm going to start playing with some GAL's I have an will be needing a programmer. I'd be looking for one with a USB interface that works with Windows 10, and supports a wide array of devices. While I'm starting with basic GALs, I'd expect I'd move on to more complicated devices.
Any advice...
I was just busy fault finding a VFD unit that had broken and came across a CPLD IC from lattice.
I looked into CPLDs a bit a year ago for some high speed counting application, and the only ones I found much info on at the time were from Altera. The packages are certainly powerful, but seem to...