I saw a circuit that uses two NMOS MOSFETs as a voltage divider, and I was just wondering why that would be used instead of just using a normal resisitive divider? A screenshot of the CMOS circuit is attached.

 

It may be so it will dissipate less power than a voltage divider with the same impedance.

But that's a poor circuit for that purpose, since it depends on the gate-source threshold of the particular MOSFET used, and that voltage can vary significantly from unit to unit.

 

Hi there. I bet you he or she didn't have any resistors.
I have made voltage dividers composed of any combination of elements such as resistors, inductors, capacitors. Was not my proudest moment but the circuits worked.

 

Are those two NFETs the same dimensions? If so, it seems odd that the voltage at the junction isn't the midpoint of the power supply since both transistors are diode-connected and the junction is the Vgs of the bottom transistor above ground and the Vgs of the top transistor below the rail and both transistors are carrying the same current.

Do they have different widths and lengths and that just isn't being shown?

What kind of circuit was this for that you saw this on? Was it an integrated circuit? If so, it's likely that it was a bias voltage generator in which the top transistor is setting a current in the both transistor and the bottom transistor is one said of a current mirror. One of the beautiful things about integrated CMOS circuits is that you can then duplicate that current in literally millions of other transistors throughout the chip.

 

Are those two NFETs the same dimensions? If so, it seems odd that the voltage at the junction isn't the midpoint of the power supply since both transistors are diode-connected and the junction is the Vgs of the bottom transistor above ground and the Vgs of the top transistor below the rail and both transistors are carrying the same current.

Do they have different widths and lengths and that just isn't being shown?

What kind of circuit was this for that you saw this on? Was it an integrated circuit? If so, it's likely that it was a bias voltage generator in which the top transistor is setting a current in the both transistor and the bottom transistor is one said of a current mirror. One of the beautiful things about integrated CMOS circuits is that you can then duplicate that current in literally millions of other transistors throughout the chip.

Hi, yes the FETS have lengths and widths that are different, it is designed in such a way that it gives an output of 1V. It is just a standalone circuit, it was not anywhere. I was just wondering what are the advantages over a resistive divider/

 

Hi, yes the FETS have lengths and widths that are different, it is designed in such a way that it gives an output of 1V. It is just a standalone circuit, it was not anywhere. I was just wondering what are the advantages over a resistive divider/

Are you sure it wasn't meant to be used on an IC? I've never seen discrete MOSFETs where the user had the ability to control the widths and lengths.

If it was an IC-based circuit, then IC designers hate using resistors if they can avoid it because, compared to FET transistors, they chew up lots of valuable silicon real estate. Also, they are notoriously inaccurate in terms of value.

Most CMOS processes are pretty well characterized so it isn't too hard to size a transistor that has a gate-source voltage, when diode connected, that has close to a desired value. when a particular current is flowing through it. You then size the top transistor to provide that current with the remaining voltage as the gate-source voltage. It's not a very good reference -- the power supply rejection ratio isn't going to be very good and it's going to be temperature sensitive (though not as bad as you might think), but it might be good enough for what it is being used for.

EDIT: Fix typos.

 

Just a small point of fact only for information purposes.

Two NMOS configured as such is not technically considered "CMOS" where one of the two would be PMOS.

 

Just a small point of fact only for information purposes.

Two NMOS configured as such is not technically considered "CMOS" where one of the two would be PMOS.

That's one of the reasons I suspect that the circuit is for an IC (fabricated on a CMOS process).

 

Might be worth looking up voltage translators or how they work.
CMOS logic 4050 or 4049 are commonly used and Texas do a lot of logic level translators.
Just a thought

 

I saw a circuit that uses two NMOS MOSFETs as a voltage divider, and I was just wondering why that would be used instead of just using a normal resisitive divider?

It would only make sense on an integrated circuit where resistors would take more die area.

 

Not every circuit that I have seen published will actually work, even if it worked once for whoever built it. And some circuits published have never even been built. So that is another possible situation. Somebody thinks that a circuit would work.
And some have observed that not everything found on the internet is correct.