I am trying to make a logic circuit for a clock for my 8 bit computer project. Following Ben Eaters' recipe. To challenge myself and learn something about gates, I am trying to draw my own clock control using NAND gates.

The circuit should make it possible to change between the capacitor 555 timed signal and manual clock progression. And also a Halt function.

But, I have never done anything like this before, so I don't really know where to start, or what is the regular procedure when drawing this stuff.

I just started with the truth table for what I want my circuit to do, then I draw'ed a whole bunch of NAND gates on the paper, and just tried to connect the wires from there. Are there better ways? I can use this method now, because I know the circuit can be made of only NAND gates, but when I don't know, It's going to get messy.

Where/how do you usually start a circuit? Is there some sort of technique I'm missing?

 

Possibly this might help -

https://sciencedemos.org.uk/logic_gates.php

http://www.cburch.com/logisim/

When you get experience there are parts that have GUI design tools
and you can wire them up inside chip and test them on a breadboard.

Regards, Dana.

 

what is the regular procedure when drawing this stuff.

I'd start with a block diagram. I'd use a truth table if the logic was too difficult to solve mentally. Then I'd draw a schematic, simulate (either mentally or with a program). Then build and test after I thought I had the desired functionality.

Post your work.

 

I am trying to make a logic circuit for a clock for my 8 bit computer project. Following Ben Eaters' recipe. To challenge myself and learn something about gates, I am trying to draw my own clock control using NAND gates.

The circuit should make it possible to change between the capacitor 555 timed signal and manual clock progression. And also a Halt function.

But, I have never done anything like this before, so I don't really know where to start, or what is the regular procedure when drawing this stuff.

I just started with the truth table for what I want my circuit to do, then I draw'ed a whole bunch of NAND gates on the paper, and just tried to connect the wires from there. Are there better ways? I can use this method now, because I know the circuit can be made of only NAND gates, but when I don't know, It's going to get messy.

Where/how do you usually start a circuit? Is there some sort of technique I'm missing?

1. Divide your schematic into functional blocks.
Then draw the circuit in each block:
inputs on left.
outputs on right
signal flow from left to right (input to output)
power connections flow from top(+ supply) to bottom (GND or - supply).

2. Interconnect the functional blocks:
signal flows left to right (inputs to outputs)
power connections flow top(+supply) to bottom( GND or - supply)

These are general rules to follow to help get started.

eT

 

Thanks for all the help.

I am trying to stick to pen and paper at first, as that's what worked best for me in school, and forces me to think, and not "just click".

This is what I've come up with so far. It's only a sketch, so I hope those interested can bear with me.

I wanted it to be a block diagram, but It looks more just like regular gates. I don't know if the truth table is correct, I just thought what I wanted the circuit to do, and plugged in the results as I went by.

 

I don't know if the truth table is correct, I just thought what I wanted the circuit to do, and plugged in the results as I went by.

If you want to do it formally, your table needs to have 16 rows. Four variables gives you 2^4 possible combinations.

Additionally, it is easier to populate Kmaps if you order the rows in Gray Code order (only one variable changes between adjacent rows). This can be solved using SOP (Sums Of Products) or POS (Product Of Sums). SOP is more common.

This won't give you an all NAND implementation. To do that, you simplify the equation using Kmaps and then use DeMorgan's Law to convert all logic to NANDs.

I assume you've looked at Ben Eaters' information on the clock. He showed a NAND only implementation consisting of 7 2 input NAND gates. Or are you trying to do learn how to do this from scratch?

 

I stopped after 6 rows, just so I could start connecting gates. But I need to write the rest of the rows, when I get further along, I guess.

Never thought about using Kmaps, since I don't know how to read them, never looked into it. I will try that, definitely.

I feel I need to learn more of the basics, before I move along with the project. His clock part finished with connecting those gates, where he had two circuits examples, one with mixed gates (which he used), and one with NAND. I only briefly saw the NAND paper, and thought that would be a great exercise in drawing circuits, since I have never tried it before. So I am trying to see if I can come up with a circuit that does the same.

 

I stopped after 6 rows, just so I could start connecting gates. But I need to write the rest of the rows, when I get further along, I guess.

You're going about it all wrong. Unless you want to fly by the seat of your pants, you need to draw a fully populated truth table.

There are many ways to implement a circuit that will do what you want. I could sling gates and come up with a solution, but to teach someone the thought process, the solution needs to be formal so you can see exactly how he arrived at his solution.

Once I drew the truth table, I simplified the logic using Kmaps. Then, for fun, I implemented the circuit using different types of gates.

 

Never thought about using Kmaps, since I don't know how to read them, never looked into it. I will try that, definitely.

Since this isn't homework and you've never done this before, I'll show you how to solve this.

This is a fully populated truth table:

The legend at the bottom correlates the column headings I used; because I didn't feel like changing them in my spreadsheet.

I chose D, which I consider the most significant bit, to be Halt. I ordered the data so that only the first 8 mattered (when Halt wasn't asserted (HIGH)).

I chose C to be Select so the table entries would be grouped for when Select was LOW or HIGH. The order for Man and Clock was a toss up and I chose B to be Man(ual clock).

Z is the output of the logic.

Transferring the data to a Kmap yielded the following:

There are two groupings of 2 minterms (each cell is called a minterm). For a SOP implementation, we group maximal groupings of 1's.

The first term (D'C'B) is for the orange grouping, D'CA is for the blue grouping. If you were concerned about glitches, we'd add another term to the equation. Ben wasn't, so we won't worry about glitches either.

The implementation of the above equation and Ben's are below:


Using the first letters of the variables above, my equation becomes:
Z= H'S'M+H'SC
(reading the variables on the gates from top to bottom, an apostrophe denotes a negated signal)

From Ben's logic, his equation is (I ordered the way he had on his video):
Z = (CS+S'M)H'

Using boolean algegra, and rearanging variables, his equation is:
Z = H'S'M+H'CS
Which is the same as the equation from my Kmap.

 

Wow! Thanks for the help. Now I have to study your solution, so I can learn something

I can see I was somewhat way off. Thanks for clearing this up.

Thought I think some logic homework would be in order for me, so I can get comfy with Boole and gates. I don't even know the algebra. Yet.

Do I now use De Morgans law to convert the circuit into all NAND gates? I could also do it with other gates, but I don't have any 3 input gates.

 

Now I have to study your solution

Notice that the truth table is in gray code order and if you read the rows of the Kmap, they're in the same order.

The first row in the table (in DCBA order) is 0000. The upper left cell of the Kmap is 0000.

The next row in the table is 0001 and the next cell to the right is 0001.

When you get to the 5th row in the table, the second row in the Kmap fills from right to left.

 

I don't even know the algebra. Yet.

It has similarities to regular algebra.

What you'll probably find most confusing is that 1+1=1; or not...

 

You should learn the laws of Buls algebra.

 

@dl324 I have chewed on your post for a bit now, and things are really starting to make sense! Only need to study the Kmap a bit more, and how to rewrite the equation to all NAND. I have bought a book on digital electronics, which I keep by my side, while I read your post (and the book, and the post..). Good stuff

This is actually quite fun.

I got the idea to make a circuit where the task is to get 4 LED's to light by pushing 4 different buttons in various ways. Just to get some practice.

@ArakelTheDragon I am right in the middle of it.

 

Only need to study the Kmap a bit more

Let me know if you have questions. There should be tutorials on this site and the way I do a 4 variable map is the same as they teach in schools/books. I do 5 and 6 variable maps differently. The way they teach that now is to use 2 or 4 4x4 maps and overlay them. I do 5 and 6 variables in a single map.

how to rewrite the equation to all NAND.

You can do it with boolean algebra, but boolean algebra isn't one of my strengths. I don't use it much and skills have gotten rusty.

The expression with the 3 input NAND gates is easiest to convert to all NAND. You invert the inputs of the OR gate, change the OR to an AND, and invert the output. By bubble pushing the bubbles (inversions) on the inputs to the outputs of the 2 3 input NANDs, you turn all three gates into NAND.

To convert to all 2 input NAND gates, you could start with Ben's original clock circuit and do similar operations until all gates are NAND.

I got the idea to make a circuit where the task is to get 4 LED's to light by pushing 4 different buttons in various ways. Just to get some practice.

The process is similar to the clock problem. You have 4 variables and 4 outputs. For each of the 16 combinations of the inputs, you simply define which LEDs will be on and solve the Kmaps.

 

Yeah, I will be looking through the tutorials on the page, as they are very well written.

My digital book uses the overlay method, but I haven't gotten that far yet.

Again, thanks a whole lot for your help. A really good push in the right direction.

 

Again, thanks a whole lot for your help.

Once you've transferred data from truth tables to Kmaps enough times so you don't have to think about it, you might find it convenient to use a spreadsheet to do it for you. That's why I didn't bother renaming my column headings because I'd have to also change the headings for the Kmaps.

I have spreadsheets for 4, 5, and 6 variables and spreadsheets for the different types of flip flops for 5 and 6 variables. If I do a counter with fewer than 5 variables, I still use the 4 variable spreadsheet and just ignore the unused variables.

 

You should take tour time with this, it's not a little to swallow.

 

You are probably right. I really wan't to move on with my project, but the bit I've learned about boole and gates the past couple of days has made a tremendous difference in how I see my project now. There is a lot of basic logic stuff that I need to get better at.

 

There is a lot of basic logic stuff that I need to get better at.

Don't let that stop you from building stuff and having the personal satisfaction of building stuff and have it work.

You don't have to know how an integrated circuit works internally before you can design and/or build useful/fun things. We all stand on the shoulders of giants in this field. Few know how to design transistors, but that doesn't stop anyone from using them.

I didn't really consider what was in TTL chips until I knew enough to be concerned about the guts (i.e. how to calculate pull up/down resistor values and determine input loading to deal with fanout). The first largish circuit I designed with TTL was having a fanout issue (which I hadn't ever had to consider before). I was using standard TTL (maybe LS). When I found the driver that was overloaded, I just swapped that chip with 74S. Didn't understand why that worked at the time, but I came to understand it later after I had more experience.

You can also learn from reading application notes and datasheets. I copied my style for decoder and counter layout from TI datasheets. I've also learned from looking at the work of some "professionals" some things not to do.