Im using DG444 quad cmos analog switches for a project, the pin out includes a VL pin for logic reference voltage with the absolute max ratings for the pin stating (GND - 0.3V) to (V+) + 0.3V.
Which is a little confusing, so if I supply 5V to V+ should I also route this to VL? Or should I tie VL to Gnd?
Is it just a case of one or the other will do?
The chip is going to be on a PCB with a ground plane
Data sheet
http://www.intersil.com/content/dam/Intersil/documents/dg44/dg444-45.pdf
Which is a little confusing, so if I supply 5V to V+ should I also route this to VL? Or should I tie VL to Gnd?
Is it just a case of one or the other will do?
The chip is going to be on a PCB with a ground plane
Data sheet
http://www.intersil.com/content/dam/Intersil/documents/dg44/dg444-45.pdf