This may be novice question. I am understanding SAR ADC specification for modeling perspective. In the mean time I was following analog devices Driving SAR ADC. In general what the necessity for a driver when it matches T acq and T cov of the selected ADC datasheet? What else test situation or parameter am I missing ?

 

This may be novice question. I am understanding SAR ADC specification for modeling perspective. In the mean time I was following analog devices Driving SAR ADC. In general what the necessity for a driver when it matches T acq and T cov of the selected ADC datasheet? What else test situation or parameter am I missing ?

Depending on the source of the analog input and the nature of your analog input and sampling method you may or may not have a problem. More details are required.
Can you provide a link to the reference you are referring to?

 

The source impedance has to be low enough to provide the required input charge for the ADC to bring the input voltage to less than 1 LSB of the final voltage during the ADC sample period.
Depending upon the input charge requirements of the ADC and the sample period, an input buffer amp may be required to get a low enough source impedance to meet the above requirements.

 

Depending on the source of the analog input and the nature of your analog input and sampling method you may or may not have a problem. More details are required.
Can you provide a link to the reference you are referring to?

Here are some of the links that I am referring to
Maximize the Performance of Your Sigma-Delta ADC Driver
Using SAR ADC TINA Models: Much ado about settling
Front-End Amplifier and RC Filter Design for a Precision SAR Analog-to-Digital Converter

 

Here are some of the links that I am referring to
Maximize the Performance of Your Sigma-Delta ADC Driver
Using SAR ADC TINA Models: Much ado about settling
Front-End Amplifier and RC Filter Design for a Precision SAR Analog-to-Digital Converter

It may take me a while to review those materials.

 

I have seen data sheets say that a particular amplifier is well suited and sometimes there is an example circuit.
The engineer must be specific in their goals, as to which characteristics to either avoid or utilize, revise or improve what is working and how it can beat the other guys design. Today there are many evaluation boards being studied. The evaluation board documentation may include board layout which also contains criteria. As time goes by the engineers trying different approaches might hit on what the powers that be are looking for and will harvest the work of those clever engineers.

Because there is a variety of applications there are a number of buffer types, Where the input comes from and how it is sensed can play an important role in determining whether the sample contains what the engineer is most interested in converting it to a stable digital format. That is why the input to an ADC is evaluated keeping in mind the effect on the goal of the application. In some research the desired output continues to find the the cat is still chasing his tail so changing out the op amp along with features on the evaluation board allow easier modification changes. These extras are unnecessary in the finished board. Sometimes the bug style or Manhattan style is faster and easier. A notebook explaining why and how certain parameters are selected should include notation with respect to the goals. It should answer why the need for a buffer for an ADC is being made, otherwise there might be an error in the premise of what works better in this application.

 

I have seen data sheets say that a particular amplifier is well suited and sometimes there is an example circuit.
The engineer must be specific in their goals, as to which characteristics to either avoid or utilize, revise or improve what is working and how it can beat the other guys design. Today there are many evaluation boards being studied. The evaluation board documentation may include board layout which also contains criteria. As time goes by the engineers trying different approaches might hit on what the powers that be are looking for and will harvest the work of those clever engineers.

Because there is a variety of applications there are a number of buffer types, Where the input comes from and how it is sensed can play an important role in determining whether the sample contains what the engineer is most interested in converting it to a stable digital format. That is why the input to an ADC is evaluated keeping in mind the effect on the goal of the application. In some research the desired output continues to find the the cat is still chasing his tail so changing out the op amp along with features on the evaluation board allow easier modification changes. These extras are unnecessary in the finished board. Sometimes the bug style or Manhattan style is faster and easier. A notebook explaining why and how certain parameters are selected should include notation with respect to the goals. It should answer why the need for a buffer for an ADC is being made, otherwise there might be an error in the premise of what works better in this application.

TI Precision Lab
This presentation explains about necessity of driver in short is it to pump the charges faster to charge bucket capacitor?
How can this be related to instability and bandwidth necessity?

 

select a suitable RC filter.
https://www.analog.com/en/analog-dialogue/articles/front-end-amp-and-rc-filter-design.html