architecture behavioral of circuit1 is
signal a:std_logic_vector(1 downto 0);
signal b:std_logic_vector(3 downto 0);
signal f:std_logic;
begin
f<=B(0) when A=''00'' else
B(1) when A=''01'' else
B(2) when A=''10'' else
B(3);
end behavioral;
Please help me with this code I need it for exam tommorow,is this a decoder?
signal a:std_logic_vector(1 downto 0);
signal b:std_logic_vector(3 downto 0);
signal f:std_logic;
begin
f<=B(0) when A=''00'' else
B(1) when A=''01'' else
B(2) when A=''10'' else
B(3);
end behavioral;
Please help me with this code I need it for exam tommorow,is this a decoder?