I want to know difference between Verilog & verilog A , Is it only verilogA is used to model behavioral structure to analog blocks ? As verilog can do that as well

 

Verilog cannot model analog functions.

 

If you are interested in Verilog and Verilog-A, you might also be interested in VHDL/VHDL-AMS.

VHDL-AMS is a superset of VHDL that includes analog and mixed-signal constructs. It's a nice way to have all of the benefits of modeling transfer functions, analog and digital electronics, and sensors & actuators all at the same time.

There is a new online, browser-based environment that provides free access to this language, a schematic environment for constructing designs, a cloud simulator, and browser-based waveform tools. Go to www.systemvision.com to try it out.

(full disclosure: I work on the team providing systemvision.com. Ask me anything that you would like to know about it.)