Hi, I want to simulate VDD glitch. For example I want to raise 1.2V VDD to 4-5 Volts for tens of microseconds and lower back to 1.2V. Suppose I have a high rise and fall time pulse generator (200-500 picoseconds). My concern is that some digital ICs (like CPUs) have some capacitors on them to filter supply parasitics and serve as charge reservoir. Do these capacitors hinder the high rise and fall time of the signal generator because of their time constants? Can I still get a fast changing VDD in spite of the capacitors? Thank you.

 

Welcome to AAC!
If you are using a software simulator such as LTspice, you can use a pulse generator as, or in series with, the Vdd source.

 

Thank you Mr Alec,
Does this simulate real application?

 

A glitch of ms is not a glitch, its a problem / brown out brown up
glitches tend to be rated as ns wide.

Do you want to do this on a real circuit ?
Its on a power line, which is normally decoupled ,so your fighting the decoupling.

Simulation is the normal way to investigate glitches on power supply systems,
as there you have free rain,

The "problem" is you are simulating the power delivery system, not the effect on the chip that glitch has.

To simulate a real chip and effects a glitch on its PSU is very much more difficult, not least getting good models.

On a real bit of hardware,
you can use a pulse generator, and a resistor divider to inject extra voltage onto the power lines
or a inductor to induce a pulse.
( I have seen it done with a capacitor feed through also , but it was more difficult )

it more difficult to "take voltage away" to test low going glitches.

 

I just need if the VDD inside chip can rise and fall as the applied VDD signal does (300-500 ps) in spite of the caps at supply of IC.

 

I just need if the VDD inside chip can rise and fall as the applied VDD signal does (300-500 ps)

Then you will need an accurate model of the chip.