I've never needed to incorporate transistors into a solution but I'm trying to do so and it seems to work but have concerns:



The title actually in reality is a little misleading. The incoming pulse is through an opto-coupler (to the best of
my knowledge), or for the purposes of this question a switch (SW_SPST) which is/are limited to <2mA and
between 5-15VDC. The only supply I have in the area is a 24VDC and the pulse is recorded through
a data logger, the input to the logger is labelled OUT. The Data logger inputs are limited to 20V to 24V
also less then 2mA.

Everytime a pulse comes through (switch is closed) Va is shorted to GND, and OUT becomes 24V, when the
switch is open OUT is close to GND. My question(s) are simple... I want to make sure I didn't mess the idea up...
it is simple but I'm old so who knows:

A] Is Va with in the 5-15VDC range, and is the current through the switch <2mA when closed?
B] Will the OUT swing between GND (or close to it) and 24VDC, not exceeding 2mA to the logger?

I tested this out on a bread board and it appears to do as I wish, but I couldn't for the life of me find anything
about Voltage limits on the Base in the datasheet... not even a Vb must be <Vce... So am I to assume (you know what
that makes me?) that the voltage at the base is fine as long as I don't exceed the maximum current Ibe?

Sorry I hope that is clear what I'm asking, and again I'm way out of my comfort zone so please don't
be mean.

Oh and Hello, as this is obviously my first post.

Chris

 

When the switch is open the base will only be at about + 0.7 volts with respect to the emitter. (Ground.) This is because the base emiter junction behaves like a diode. The Vbe rating is the maximum that the base can be negative with respect to the emitter. In your circuit the base never becomes more negative than zero volts. It is normal to draw the schematic with the positive rail at the top.

Les.

 

Ah yes, it is an upside down sort of schematic...things were jotted down on a scrap piece of paper using a connector as the orientation. Which I simply copied to KiCad to have a presentable drawing. Thanks for the response.

 

Looks to me like it will meet your requirements. I think the 5k resistor is redundant. Its only purpose would be to limit base current through the transistor, but the 15k resistor is already enough to limit base current to reasonable levels. On the other hand, it's harmless, so if it's already built, no need to change it now.

 

A] Is Va with in the 5-15VDC range, and is the current through the switch <2mA when closed?
B] Will the OUT swing between GND (or close to it) and 24VDC, not exceeding 2mA to the logger?

Chris

Hi
I took a guess at the actual circuit design including the opto.

A] Its about 6.5 volts. The 15k resistor will limit the current thru the switch to about 1.6mA. But since the switch is really an opto, the current draw should be less.

B) The output will swing from ground to a high level determined by the load imposed by the datalogger input. But it wont be at 24v because of the voltage drop across the 24k resistor. The sim shows a load of about 500uA and the effect it had on the voltage out.

I moved the 10k pull down resistor to the base of the transistor. It helps ensure the transistor is completely off when not activated thru the base resistor.

See schematic and sim attached.

eT

 

Wow, thanks very nice. I appreciate everyone answering. Made me feel a little more comfortable as a quick fix to a problem.

Chris

Oh and eT, I really should take the time (a few years I hear) to learn LTSpice... I could learn a lot.

 

Welcome to AAC!

I really should take the time (a few years I hear) to learn LTSpice... I could learn a lot.

Do yourself a favor and learn the basics before you start using a simulator.