using DC sweep to replace mathematical expression logic of diff pair biasing

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yef smith

Joined Aug 2, 2020
1,446
Hello,In the manual below they have a design example.
In step 3 shown below they find mathematickly the W/L assuming 50uA flows threw it and Vsg=0.5.
Because mathematical expressions of a mosfet are aproximations ,I wanted to find using a simulation given Vsg=0.5 the values of W/L that causes Ids=50uA threw it.
As you can see below , thats what I was trying to do ,100uA splits in half and we have Vsg=0.5.
this is the best I could think of representing the mathematical equation.
In the manual they represent drain voltage purely without load to want the PMOS sees, they just say Vtn1 is 0.7 and thats it.
they plug the numbers into Vsg of M3 and thats it.
How can I find the W/L in simulation way?
Thanks.
https://aicdesign.org/wp-content/uploads/2018/08/lecture19-150211.pdf
LTspice file is attached.
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