We're making a BCD counter that counts from 0 to 9 and 9 to 0 using JK F/F. I'm having trouble resetting from 9 to 0 in the up counter and I'm running out of ideas to fix this.

I followed a certain post here regarding that and I came up with this:

from this

Anyway, the counter seems to be fine if I connect all the reset pins to Vcc. It ends up counting up to HEXF and so forth. The down counter seems fine too. I made a detailed logic gates of the reset pins like this

I don't know what else to do. Been trying to think this and thought the IC was the problem, turns out there was a problem with simulating it too

 

Is this homework? Your other related post was in a different forum.

https://forum.allaboutcircuits.com/threads/74ls73-up-down-counting-problems.133011/

Post your truth table, Kmaps, and equations.

 

What is the purpose for resetting FF2 & FF3 when the Q1Q2Q3Q4 counter value is 0000 (RED lines)? Resetting flip-flops that are already reset????

 

More importantly, what is the point of using JK flip flops if J and K are tied together?

 

what is the point of using JK flip flops if J and K are tied together?

Ever tried to buy a T flip-flop in a commercially available package? This design could be for a goldberg counter, but I want to hear it from the TS.

 

Ever tried to buy a T flip-flop in a commercially available package?

That's not my point. In the original post, the OP said:

We're making a BCD counter that counts from 0 to 9 and 9 to 0 using JK F/F.

To me that means he's supposed to design a BCD U/D counter using JK flip flops, not T flip flops...

If he "designs" a counter, he won't need to use reset.

 

What is the purpose for resetting FF2 & FF3 when the Q1Q2Q3Q4 counter value is 0000 (RED lines)? Resetting flip-flops that are already reset????

I forgot to add the the gates connected to the reset pins are NAND ones. What do you mean by what's the purpose of resetting it during 0000? Should I change something on the gate with ~q1,~q2,~q3, & ~q4?

That's not my point. In the original post, the OP said:
To me that means he's supposed to design a BCD U/D counter using JK flip flops, not T flip flops...

If he "designs" a counter, he won't need to use reset.

So this thing was a T-F/F. I didn't realize it and was weirded out when it used the reset pins. Anyway, I'm trying to make a truth table but it hurts my eyes manually calculating each result from Previous and Next Stage to J K results. IS there any program that makes this somewhat easier?

 

You are being asked to create a synchronous counter based on the principle of finite state machines.

This is a classic exercise in any introductory course on digital circuits.

For this, you need to be knowledgeable on truth tables, Karnaugh maps and boolean expressions.

All of the above are discussed in detail on the AAC tutorials on Digital Circuits.

For further insight, look at past AAC forum threads on this topic.

 

I'm trying to make a truth table but it hurts my eyes manually calculating each result from Previous and Next Stage to J K results. IS there any program that makes this somewhat easier?

When you're learning, there are no short cuts. Repetition will make it easier to remember decades from now.

For now, you should develop a technique that minimizes your pain.

 

IS there any program that makes this somewhat easier?

If your computer has Java installed then you might try using logisim. It is free software you can download as a .jar file.
https://www.electronics-micros.com/software-hardware/creating-truth-tables-with-logisim/