Hello,
First off, I would like to say that I am new to this forum and I apologize in advance if I do not adhere to any norms.
As far as my issue is concerned, I am working on a wireless power transfer system for my electrical engineering capstone/design thesis project. Over the past few months I have successfully designed and implemented many parts of the system, however recently I have been working on the practical implementation of a Class E power amplifier (designed for 13.56MHz to output about 20W of power) and I have come across some issues. Now, I have designed the amplifier using Agilent ADS and in simulation it works wonderfully. However, when I went into the lab to test the circuit, I found some odd behavior.
In particular, the issue I am having is that when I operate at the desired frequency of 13.56MHz, the output waveform at the drain of the transistor does not exhibit the switching waveform that is characteristic of the Class E amplifier. Also, changing the gate bias and therefore conduction angle of the amplifier does not really change anything. Instead, I end up with a DC offset and slightly amplified version of the signal I am giving to the gate of the transistor. Furthermore, when I try to increase either the gate bias or drain bias beyond 2V and 5V respectively, I end up with a strange amplitude modulated signal which seems to have components at about 5MHz and 80MHz. The strange behavior doesn't stop there. I find that when I run at lower frequencies (up to 5 or 6MHz) I do see the switching waveform and am able to control the conduction angle of the waveform using the gate bias and the amplitude of the waveform using the drain bias. That is, I get the expected characteristics at a lower frequency range.
I would like to know if anyone has any suggestions as to what could be causing such behavior as I have been unable to solve this problem for the past week or so. Unfortunately, my school does not have any professors who are experts in RF circuit design and so I am pretty much on my own in this regard. I have attached a schematic of the amplifier circuit as well as the waveforms that I expect in simulation. I would also like to add that the inductors I am using have self-resonant frequencies larger than 13.56MHz (the lowest SRF is 100MHz). Also, the transistor I am using is the MRF6V2150N LDMOS by NXP, which I have come across in a few IEEE papers which use the device in Class E PA design.
Any suggestions or insight would be greatly appreciated.
Thanks in advance.

First off, I would like to say that I am new to this forum and I apologize in advance if I do not adhere to any norms.
As far as my issue is concerned, I am working on a wireless power transfer system for my electrical engineering capstone/design thesis project. Over the past few months I have successfully designed and implemented many parts of the system, however recently I have been working on the practical implementation of a Class E power amplifier (designed for 13.56MHz to output about 20W of power) and I have come across some issues. Now, I have designed the amplifier using Agilent ADS and in simulation it works wonderfully. However, when I went into the lab to test the circuit, I found some odd behavior.
In particular, the issue I am having is that when I operate at the desired frequency of 13.56MHz, the output waveform at the drain of the transistor does not exhibit the switching waveform that is characteristic of the Class E amplifier. Also, changing the gate bias and therefore conduction angle of the amplifier does not really change anything. Instead, I end up with a DC offset and slightly amplified version of the signal I am giving to the gate of the transistor. Furthermore, when I try to increase either the gate bias or drain bias beyond 2V and 5V respectively, I end up with a strange amplitude modulated signal which seems to have components at about 5MHz and 80MHz. The strange behavior doesn't stop there. I find that when I run at lower frequencies (up to 5 or 6MHz) I do see the switching waveform and am able to control the conduction angle of the waveform using the gate bias and the amplitude of the waveform using the drain bias. That is, I get the expected characteristics at a lower frequency range.
I would like to know if anyone has any suggestions as to what could be causing such behavior as I have been unable to solve this problem for the past week or so. Unfortunately, my school does not have any professors who are experts in RF circuit design and so I am pretty much on my own in this regard. I have attached a schematic of the amplifier circuit as well as the waveforms that I expect in simulation. I would also like to add that the inductors I am using have self-resonant frequencies larger than 13.56MHz (the lowest SRF is 100MHz). Also, the transistor I am using is the MRF6V2150N LDMOS by NXP, which I have come across in a few IEEE papers which use the device in Class E PA design.
Any suggestions or insight would be greatly appreciated.
Thanks in advance.

