MPLABX V6.05
XC16 V2.00
PIC24EP256GP204
PICKIT4 supplying power, 3.3V
4MHz crystal

No compilation errors or warnings.

Program for production completes without error.

However, programming for debugging gives:

Fatal error: 0xc04
The target device is not ready for debugging. Please check your configuration bit settings and program the device before proceeding. The most common causes for this failure are oscillator and/or PGC/PGD settings.

I have created a bare bones project using the internal oscillator and toggling RA0. This would be too fast for an LED. OSC2 is set as oscillator output.
When trying to run this program I get about 3.6MHZ on OSC2 but only a logic '1' on RA0 (this pin does have a 10k pull-up on the board).

Trying to debug gives the same 'not ready' message.

// PIC24EP256GP204 Configuration Bit Settings

// 'C' source line config statements

// FICD
#pragma config ICS = PGD1               // ICD Communication Channel Select bits (Communicate on PGEC1 and PGED1)
#pragma config JTAGEN = OFF             // JTAG Enable bit (JTAG is disabled)

// FPOR
#pragma config ALTI2C1 = OFF            // Alternate I2C1 pins (I2C1 mapped to SDA1/SCL1 pins)
#pragma config ALTI2C2 = OFF            // Alternate I2C2 pins (I2C2 mapped to SDA2/SCL2 pins)
#pragma config WDTWIN = WIN25           // Watchdog Window Select bits (WDT Window is 25% of WDT period)

// FWDT
#pragma config WDTPOST = PS32768        // Watchdog Timer Postscaler bits (1:32,768)
#pragma config WDTPRE = PR128           // Watchdog Timer Prescaler bit (1:128)
#pragma config PLLKEN = ON              // PLL Lock Enable bit (Clock switch to PLL source will wait until the PLL lock signal is valid.)
#pragma config WINDIS = OFF             // Watchdog Timer Window Enable bit (Watchdog Timer in Non-Window mode)
#pragma config FWDTEN = ON              // Watchdog Timer Enable bit (Watchdog timer always enabled)

// FOSC
#pragma config POSCMD = NONE            // Primary Oscillator Mode Select bits (Primary Oscillator disabled)
#pragma config OSCIOFNC = OFF           // OSC2 Pin Function bit (OSC2 is clock output)
#pragma config IOL1WAY = ON             // Peripheral pin select configuration (Allow only one reconfiguration)
#pragma config FCKSM = CSDCMD           // Clock Switching Mode bits (Both Clock switching and Fail-safe Clock Monitor are disabled)

// FOSCSEL
#pragma config FNOSC = FRCDIVN          // Oscillator Source Selection (Internal Fast RC (FRC) Oscillator with postscaler)
#pragma config IESO = ON                // Two-speed Oscillator Start-up Enable bit (Start up device with FRC, then switch to user-selected oscillator source)

// FGS
#pragma config GWRP = OFF               // General Segment Write-Protect bit (General Segment may be written)
#pragma config GCP = OFF                // General Segment Code-Protect bit (General Segment Code protect is Disabled)

// #pragma config statements should precede project file includes.
// Use project enums instead of #define for ON and OFF.

#include <xc.h>

int main(void)
{
// Port A access ? see Section 1.4
ANSELA = 0xFFFE; // set RA0 to digital I/O (not analog)
TRISA = 0xFFFE; // set RA0 port bit to be output
while(1)
    {
        LATA |= 0x0001; // write to port latch
        Nop();
        LATA &= 0xFFFE;
        Nop();
    }
return 0;


}

 

Try with the 2.10 compiler.
https://forum.microchip.com/s/topic/a5C3l0000003jXXEAY/t390023

 

I just tested V2.10 and Mplabx 6.05 on a old PIC24 project: https://github.com/nsaspook/fac_relay_clone/tree/RN4871

Debug with a PICkit4 seems to work just fine on the original prototype perfboard.

https://github.com/nsaspook/fac_relay_clone/blob/RN4871/ble_clone.pdf

 

Unfortunately it hasn't fixed my problem - with either pickit3 or Pickit4.

 

Try disabling the WDT, FWDTEN.

 

Try disabling the WDT, FWDTEN.

No, that didn't change anything.

 

I changed the PIC for a new one - no differnce.
I tried changing a few things at random.
I changed 'config ICS PGD1' to PGD2 - no difference.
Then I tried PGD3 and that fixed the problem.

I don't understand this as you are supposed to use PGD1 for debugging.

 

Try to check Vcap and MCLR connections. These are often causes for weird behavior.