the right side has almost no reflections as it's terminated (improperly).

do you agree?

I agree if your driver output impedance is only 10Ω.
The 74HC04 I used in my simulations has an output impedance of about 50Ω, which therefore showed significant reflections at the terminated load.

 

I agree if your driver output impedance is only 10Ω.
The 74HC04 I used in my simulations has an output impedance of about 50Ω, which therefore showed significant reflections at the terminated load.

an impedance of 50 ohm is large enough to give me headaches at the receiver by eating up a percentage of the voltage if i terminate in parallel or thevenin. how to solve this voltage problem? adding two 244 buffers per bus line to decrease output impedance would be impractical..

this is tricky! fixing one thing creates a problem somewhere else.

would the solution a series termination at each driver? lots of resistors, but would solve it?

otherwise it would seem like the only solution is to approximately terminate it at the receiver with a resistor larger than the drivers output impedance and hope for the best.

 

would the solution a series termination at each driver? lots of resistors, but would solve it?

Not according to my simulations.
The signal still bounces back and fourth from one end of the line to the other.

otherwise it would seem like the only solution is to approximately terminate it at the receiver with a resistor larger than the drivers output impedance and hope for the best.

That may very well work.

The 244 looks to have an output impedance of about 25-30Ω so can drive a smaller load than the 04 driver I simulated, before the voltage output gets too low.
For a bus wire far from any ground plane, the impedance would be rather high, so you likely could use an equivalent termination impedance of 200-300Ω, and that should give acceptable voltage drop from the drivers, even for termination at both ends of the line.
Here's the simulation of two 150Ω lines, each terminated in 200Ω equivalent with a 244 driver.
Looks quite acceptable.



If it somehow turns out that the impedance of this line is too variable to get the reflections down to a desired level (which I don't think will happen at this low frequency), you could go to a twisted pair for the line with one line connected to ground.
For typical wire of 22-24 gauge and insulation thickness, the characteristic impedance is typically 100-120Ω.

 

Not according to my simulations.
The signal still bounces back and fourth from one end of the line to the other.
That may very well work.

The 244 looks to have an output impedance of about 25-30Ω so can drive a smaller load than the 04 driver I simulated, before the voltage output gets too low.
For a bus wire far from any ground plane, the impedance would be rather high, so you likely could use an equivalent termination impedance of 200-300Ω, and that should give acceptable voltage drop from the drivers, even for termination at both ends of the line.
Here's the simulation of two 150Ω lines, each terminated in 200Ω equivalent with a 244 driver.
Looks quite acceptable.

View attachment 146291

If it somehow turns out that the impedance of this line is too variable to get the reflections down to a desired level (which I don't think will happen at this low frequency), you could go to a twisted pair for the line with one line connected to ground.
For typical wire of 22-24 gauge and insulation thickness, the characteristic impedance is typically 100-120Ω.

Cruts.... if I series terminate all drivers at the appropriate impedance, there will be no further reflections... why do you say so ? The signal that will be hitting the endpoints will quickly raise to the final value and stay there, the first reflection will be swallowed by the series resistor... agree?

my wire-wrap boards have ground and power plane. big ones.

of course I don't wanna series terminate each IC. I'd like to avoid that.

this is really just a databus. so the termination doesnt need to be perfect. My only edge signals are the clock signals, and those will be fine to series terminate.

so for these databus signals... do you think the best solution is thevenin at a single end? Should I decouple it as well ? How about simple parallel termination?

If you look at these schematics, the person terminated his databus at the far end, at 1k ohms, parallel: http://www.timefracture.org/D16docs/CPU_SCH.pdf

His design worked fine, and his databus is long.

 

Correct me if I am wrong but it sounds like you are putting internal signals from each wire-wrap card directly onto the bus. Otherwise i can't imagine how the bus can be 48" long.

This is not how it is done. Every card has buffers between the internal signals and the bus.

 

if I series terminate all drivers at the appropriate impedance, there will be no further reflections... why do you say so ? The signal that will be hitting the endpoints will quickly raise to the final value and stay there, the first reflection will be swallowed by the series resistor... agree?

It works for one transmission line as shown below:


But when you drive two transmission lines in parallel, as effectively occurs when you drive it from other than one end, they interact and you get a really ratty signal as below:
The impedance looking into the middle of the line no longer looks like the characteristic impedance of an end driven line.
I don't know the math on that so I can't quantify it, but I believe it's a real effect.


So what's wrong with terminating both ends of the line as I suggested in post #43, especially if you can use a higher resistor value as in his design?

 

Correct me if I am wrong but it sounds like you are putting internal signals from each wire-wrap card directly onto the bus. Otherwise i can't imagine how the bus can be 48" long.

This is not how it is done. Every card has buffers between the internal signals and the bus.

that bus I am talking about in this post is not the bus provided by the bottom PCB inside the cage. It's an internal bus that needs to be split between 2 boards because the space in 1 board is not enough for all devices forming the bus. There is no simple way to buffer the 2 boards in this case, I would need a signal to close the buffer when something is driving the buffer that has its output in the same line as the buffers output....i made drawings about that in this thread.

 

It works for one transmission line as shown below:
View attachment 146292

But when you drive two transmission lines in parallel, as effectively occurs when you drive it from other than one end, they interact and you get a really ratty signal as below:
The impedance looking into the middle of the line no longer looks like the characteristic impedance of an end driven line.
I don't know the math on that so I can't quantify it, but I believe it's a real effect.
View attachment 146294

So what's wrong with terminating both ends of the line as I suggested in post #43, especially if you can use a higher resistor value as in his design?

there is something odd in that simulation because I made the same simulation and got very few reflections:

 

the impedance of 2 parallel lines is half the impedance of a single line......

your series resistor is 120 ohms........ but the impedance of the parallel lines at 150 each is 75


I do not know why terminating both ends is bad like you asked me. Can you please tell me ? if I terminate the driver at the far end, in a multi driver line with 1 receiver, then when the far end driver is tri-stated, it will be an open line that is terminated.

here's such simulation...

 

and here is his design, with the other end unterminated. it is chaos on the left side of course. but the right side is can be fixed with correct termination.

this shows that if you dont terminate both sides, there are still reflections on the unterminate side.

what do you say?

 

and the same set-up with both sides terminated..... which you said is wrong. but the reflections are gone...so ?

 

do you want to say that the total voltage at the receiver drops if I terminate both sides ? hmmmm

 

It works for one transmission line as shown below:
View attachment 146292

But when you drive two transmission lines in parallel, as effectively occurs when you drive it from other than one end, they interact and you get a really ratty signal as below:
The impedance looking into the middle of the line no longer looks like the characteristic impedance of an end driven line.
I don't know the math on that so I can't quantify it, but I believe it's a real effect.
View attachment 146294

So what's wrong with terminating both ends of the line as I suggested in post #43, especially if you can use a higher resistor value as in his design?

I hope we are not talking about different things.... are you talking about terminating one end serially and the other one in parallel? when I talk about terminating both ends I mean both in parallel.... please confirm.......

 

that bus I am talking about in this post is not the bus provided by the bottom PCB inside the cage. It's an internal bus that needs to be split between 2 boards because the space in 1 board is not enough for all devices forming the bus. There is no simple way to buffer the 2 boards in this case, I would need a signal to close the buffer when something is driving the buffer that has its output in the same line as the buffers output....i made drawings about that in this thread.

Sorry I missed that detail.

I am still confused how the bus can be so long, though. Is there some architectural change that could shorten the buses? For instance, maybe 3 boards instead of 2. Another possibility is plugging one board onto the other board (that is, piggy backing one onto the other).

 

Sorry I missed that detail.

I am still confused how the bus can be so long, though. Is there some architectural change that could shorten the buses? For instance, maybe 3 boards instead of 2. Another possibility is plugging one board onto the other board (that is, piggy backing one onto the other).

hmmmI don't know how 3 boards instead of 2 could shorten the bus ? The thing is that it will wind up and down on those boards, and that's what adds to the length. It's quite a pain to have to divide it into 2 boards because that adds to the length, and I might indeed buffer it, but that requires some extra logic an adds delay.... this is an image of one of the boards.
the length of this board from left to right is 12 inches. for this single board, I will actually have only 2 rows of 74HC377 registers, connected to 74HC244 buffers, which then connect to the bus. So that is just 2 times 12 inches = 24 inches, horizontally, plus a small vertical length of about 2 inches. and that is for this board. then about half of that for the second board. so really the total bus will be 36 inches. and I might buffer it going to the second board, at least for the one way bus...... so its not 48 inches but more like 36....

very luckily, this bus is just a data bus, that can settle till the clock comes, so it doesnt matter if the termination isnt perfect........

 

Anyone ?

 

I just had an idea. I will split my bus into 2 halves. And I tri-state each halve into the receiver.

This way my bus will be half the original length. When each respective part needs to drive the receiver, the buffer for that part is open.
This adds no more delay than the single buffer propagation.

What you you think of this cruts?

 

and the same set-up with both sides terminated..... which you said is wrong. but the reflections are gone...so ?

No, where did I say that was wrong?
That's exactly what I proposed.

I hope we are not talking about different things.... are you talking about terminating one end serially and the other one in parallel? when I talk about terminating both ends I mean both in parallel.... please confirm.......

I'm talking about terminating both ends in parallel, which you can see in my simulation.

I trust my simulation because it's a Spice engine, which is generally the best for analog simulation.
Don't know what your simulator uses.

 

I just had an idea. I will split my bus into 2 halves. And I tri-state each halve into the receiver.

This way my bus will be half the original length. When each respective part needs to drive the receiver, the buffer for that part is open.
This adds no more delay than the single buffer propagation.

What you you think of this cruts?

Sounds okay, if you really think you need to.

 

Well you said this:

"Okay, I think a thevenin termination roughly equal to the line impedance at the far end with no driver termination may work for both lines. It is simple and will minimize the voltage loss due to termination."

and you said

"So what's wrong with terminating both ends of the line as I suggested in post #43, especially if you can use a higher resistor value as in his design?"
which gave me the impression you think that was a wrong thing to do ?

anyways yes your simulation shows good results! I will go with terminating the line at both ends for the many driver one receiver line, and I will terminate the single driver-many-receivers bus only at the end thevenin.

I did an lt spice sim here, where I have 2 lines in parallel, and series termination. you said this becomes ratty, but my simulation is fine. you simply forgot to correct the series resistor value... agree?