Terminating a bus on both ends!

Thread Starter

AnalogDigitalDesigner

Joined Jan 22, 2018
121
Hello.

I am working on a bus driven system, and I want confirmation on something I think is true.

Should I terminate a bus on both its ends if there are various tri-state devices connected to it, and only one receiver at one of the ends?

So at one of the ends I have a CMOS gate, and the other end right now is open ended.

There are various CMOS gates attached to the bus, and various CMOS outputs into the bus, one driving it at a time.

When one of them drives the bus, the signal hits both ends and reflects, causing ringing.

By terminating at both ends I ensure reflections are swallowed at both ends. I am looking at parallel termination at both ends, so that the 5V wave arrives and gets to 5V in one shot.

Here's an image of a simple simulation of a transmission line:

As you can see, no reflections at any time from either end.





Can anyone confirm this ?
 

ebp

Joined Feb 8, 2018
2,332
Yes, that's what you need to do. Keep in mind that each driver has to cope with two transmission lines in parallel, in terms of the current. If the signals spend considerable time at steady-state HIGH, you might want to consider Thevenin termination, termination to the supply rail instead of ground if permissible (often not) or AC-coupled termination if power consumption is an issue for you and you don't mind some extra parts. Thevenin termination and termination to the positive supply both require good decoupling right at the terminations.

The lumped capacitances of inputs and OFF tri-state outputs along the bus can make something of a mess of the bus impedance, so there will be reflections from each and every one of them, but they probably will be quite tolerable unless you have really high speed signals. You might need to empirically tweak the terminating resistors a little once your design is complete (not on a unit-by-unit basis), but this isn't too likely either for most situations. If things get really ugly, I think there are a few active termination devices on the market, but I haven't looked at that stuff for years.
 

MisterBill2

Joined Jan 23, 2018
8,505
Yes, that's what you need to do. Keep in mind that each driver has to cope with two transmission lines in parallel, in terms of the current. If the signals spend considerable time at steady-state HIGH, you might want to consider Thevenin termination, termination to the supply rail instead of ground if permissible (often not) or AC-coupled termination if power consumption is an issue for you and you don't mind some extra parts. Thevenin termination and termination to the positive supply both require good decoupling right at the terminations.

The lumped capacitances of inputs and OFF tri-state outputs along the bus can make something of a mess of the bus impedance, so there will be reflections from each and every one of them, but they probably will be quite tolerable unless you have really high speed signals. You might need to empirically tweak the terminating resistors a little once your design is complete (not on a unit-by-unit basis), but this isn't too likely either for most situations. If things get really ugly, I think there are a few active termination devices on the market, but I haven't looked at that stuff for years.
Once again ebp has provided a great answer. To avoid ringing each end of the transmission line does need to be terminated. AND, all of those terminations do take some power, so the driving effort increases. Careful routing that reduces the number of individual ends may help in that matter, but then there is the consideration of different time delays in the line. Depending on a lot of different things, that may matter, or it may not matter.
 

Thread Starter

AnalogDigitalDesigner

Joined Jan 22, 2018
121
Yes, that's what you need to do. Keep in mind that each driver has to cope with two transmission lines in parallel, in terms of the current. If the signals spend considerable time at steady-state HIGH, you might want to consider Thevenin termination, termination to the supply rail instead of ground if permissible (often not) or AC-coupled termination if power consumption is an issue for you and you don't mind some extra parts. Thevenin termination and termination to the positive supply both require good decoupling right at the terminations.

The lumped capacitances of inputs and OFF tri-state outputs along the bus can make something of a mess of the bus impedance, so there will be reflections from each and every one of them, but they probably will be quite tolerable unless you have really high speed signals. You might need to empirically tweak the terminating resistors a little once your design is complete (not on a unit-by-unit basis), but this isn't too likely either for most situations. If things get really ugly, I think there are a few active termination devices on the market, but I haven't looked at that stuff for years.

Thanks for that!

where exactly do you mean decoupling the thevenin termination please?

another question I have is... is I go with parallel termination, and my chips (74HC) have a maximum output current of 20mA, does that mean I have to make sure the current does not go above that, by choosing a high enough resistor, or does that mean that the current itself provided by the IC will just never go over 20mA anyway? In the first case then, if I choose a resistor large enough so the current is minimal, that will be in contradiction with the proper resistor value for termination. If the first case is correct then I would need to go with AC termination then ?

I have 2 types of bus. The first type is the ALU output, which goes into the D-inputs of many 74HC CMOS flip-flops. I think series termination would be the best for this type.

The second type, is a bunch of tri-state flip flops outputs connected to the bus, and this bus feeds into a single 74HC CMOS d-flipflop input, which is the ALU input. For this type, I think that parallel termination at the ALU input would be best, but then there is the current issue I asked above.

There is also a really bad problem. If I connect a low resistor like 100 or 200ohms from the output of a 74HC04 inverter directly to ground, the VOH goes to about 2.5V rather than 5V. How is this problem solved? How can parallel termination be used if this happens ? Should the resistor go to 2.5V rather than 0V ? If it goes to 2.5V then yes the voltage is normal at around 5V. Is this OK ?


I thought of another solution as well, using 244 buffers to decrease the bus lengths. Each device is separated on the bus by a buffer, so each is siolated to a small length of bus, therefore there would be no reflections. This adds a little delay, but I can afford the delay. Here's a picture:

 
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ebp

Joined Feb 8, 2018
2,332
Thevenin termination relies on the idea that ground and the power rail are short-circuited with regard to AC. Remember that an ideal voltage source has zero impedance at all frequencies. In order to assure that there really is an effective short circuit to the fast transitions of the signals, a local decoupling capacitor between the supply and ground close to the resistors is required - use the same caps you would use to decouple the ICs.

Ideally, a bus must be terminated in its characteristic impedance. Traces on a PCB can be made to perform well as transmission lines if they are of constant width over a ground plane. If there isn't a solid ground plane under a track, it isn't a proper transmission line (we're ignoring differential signal paths here). You can find stuff on the web about designing PCB traces for constant impedance. On thicker laminate with fairly narrow tracks, you'll probably be in the range of 100 ohms or so. So, both ends of the transmission line must be terminated in 100 ohms, and the drivers will see 50 ohms, which means that you would need to be able to source 67 mA into line to get a logic 1 of 2/3 of the supply with a 5 volt supply
i = (5 x 2/3)/50 = 0.067 A
You'll never do this with HC except with devices specifically made for line driving. Ordinary (non-driver) HC devices may source or sink more than 20 mA, but not with any guarantee of meeting required logic levels.

Note that for transmission lines longer than the transition time of the driver, the driver will only "see" the transmission line impedance at its end. Reflections will come after the first transition is complete, so you still have to contend with the current required to drive the line impedance.

HC is pretty slow, which is advantageous because the worst of the reflections, if the lines aren't too long, will come while the driver is still making the transitions.

With HC, I think it likely you will get decent results with unterminated lines if they aren't too long. The input protection diodes on receivers on the bus will help clamp over-shoots and undershoots, dissipating energy that would otherwise be reflected. Again, good power supply decoupling at each driver and receiver is important. The fact that HC logic thresholds are 1/3 and 2/3 of the supply voltage instead of "TTL compatible" is also to your advantage because it allows higher amplitude reflections without making bad logic levels.

Reflections on lines driving combinational logic often don't matter if you can allow time for the reflections to settle (sounds like you can). Signals that clock sequential logic (counters, flip-flops, registers, etc.) won't tolerate reflections that cross into the undefined input level region.

There are logic families for which any connection longer than about an inch has to be treated like a transmission line.
 

crutschow

Joined Mar 14, 2008
27,025
By terminating at both ends I ensure reflections are swallowed at both ends. I am looking at parallel termination at both ends, so that the 5V wave arrives and gets to 5V in one shot.
Parallel termination at the transmitting end doesn't work well since the output impedance of the driver is low. The termination will look like the parallel value of the driver output impedance and the termination resistance, so the termination needs to be in series.
The output impedance of a 74HC04 is about 50Ω so you would add about another 50Ω in series with the output for a 100 ohm transmission line.

But you may not need termination.
How long is the bus?
If the signal rise-time (about 8ns for the 74HCo4) is significantly longer than the electrical bus length, reflections are generally not a problem.
Here's a excerpt from this Analog Devices paper:
upload_2018-2-16_12-51-40.png

Based upon that criteria, you are okay if your bus length is ≤16 inches.
 

Thread Starter

AnalogDigitalDesigner

Joined Jan 22, 2018
121
Parallel termination at the transmitting end doesn't work well since the output impedance of the driver is low. The termination will look like the parallel value of the driver output impedance and the termination resistance, so the termination needs to be in series.
The output impedance of a 74HC04 is about 50Ω so you would add about another 50Ω in series with the output for a 100 ohm transmission line.

But you may not need termination.
How long is the bus?
If the signal rise-time (about 8ns for the 74HCo4) is significantly longer than the electrical bus length, reflections are generally not a problem.
Here's a excerpt from this Analog Devices paper:
View attachment 146181

Based upon that criteria, you are okay if your bus length is ≤16 inches.

Unfortunately my bus will be longer than 16 inches. I am aware of those rules...

What an excellent point about the output impedance interferring with the total termination resistor value... excellent. I totally ignored that.

But, the problem is that I have about 30 flip-flops outputting into this bus. So I would need one resistor network per device. Is that necessary ?

How to solve this more simply? If that is the case, it is the same as series terminating the bus.

Can I then just series terminate each device on the bus? These devices are basically 244 buffers with their outputs connected to this bus. So if I add a series network at each of these outputs, hence series terminating the bus, its A LOT of resistors, but apparently effective.
 

Thread Starter

AnalogDigitalDesigner

Joined Jan 22, 2018
121
Thevenin termination relies on the idea that ground and the power rail are short-circuited with regard to AC. Remember that an ideal voltage source has zero impedance at all frequencies. In order to assure that there really is an effective short circuit to the fast transitions of the signals, a local decoupling capacitor between the supply and ground close to the resistors is required - use the same caps you would use to decouple the ICs.

Ideally, a bus must be terminated in its characteristic impedance. Traces on a PCB can be made to perform well as transmission lines if they are of constant width over a ground plane. If there isn't a solid ground plane under a track, it isn't a proper transmission line (we're ignoring differential signal paths here). You can find stuff on the web about designing PCB traces for constant impedance. On thicker laminate with fairly narrow tracks, you'll probably be in the range of 100 ohms or so. So, both ends of the transmission line must be terminated in 100 ohms, and the drivers will see 50 ohms, which means that you would need to be able to source 67 mA into line to get a logic 1 of 2/3 of the supply with a 5 volt supply
i = (5 x 2/3)/50 = 0.067 A
You'll never do this with HC except with devices specifically made for line driving. Ordinary (non-driver) HC devices may source or sink more than 20 mA, but not with any guarantee of meeting required logic levels.

Note that for transmission lines longer than the transition time of the driver, the driver will only "see" the transmission line impedance at its end. Reflections will come after the first transition is complete, so you still have to contend with the current required to drive the line impedance.

HC is pretty slow, which is advantageous because the worst of the reflections, if the lines aren't too long, will come while the driver is still making the transitions.

With HC, I think it likely you will get decent results with unterminated lines if they aren't too long. The input protection diodes on receivers on the bus will help clamp over-shoots and undershoots, dissipating energy that would otherwise be reflected. Again, good power supply decoupling at each driver and receiver is important. The fact that HC logic thresholds are 1/3 and 2/3 of the supply voltage instead of "TTL compatible" is also to your advantage because it allows higher amplitude reflections without making bad logic levels.

Reflections on lines driving combinational logic often don't matter if you can allow time for the reflections to settle (sounds like you can). Signals that clock sequential logic (counters, flip-flops, registers, etc.) won't tolerate reflections that cross into the undefined input level region.

There are logic families for which any connection longer than about an inch has to be treated like a transmission line.

So what you're saying is that if I terminate the line at both ends (which seems to be required), at 100Ohms, then all drivers will see 50Ohms, and will need to source or sink 50mA of current (because I terminate to 2.5V rather than GND).

But HC can't source more than 20mA. So in other words, I am in trouble.

How do I solve this problem???? It seems I really need to terminate at both ends, and yet it can't be done parallely.

What is the best termination scheme that will work?


my build is wirewrap rather than a PCB.
 

Thread Starter

AnalogDigitalDesigner

Joined Jan 22, 2018
121
By the way friends,

these buses are just data lines, so could I just leave them unterminated since I will only sample them every cycle of my clock ? This would be at the cost of speed of course.

What I am tempted to do, is to just series terminate each driver, even if its a pain. It's a LOT of resistors, but seems the easier solution. AC or thevenin termination seems difficult.

Anyhow, my edge sensitive signals are just from single driver to single receiver, so that should be easy to series terminate.

my master clock signal will go everywhere, but I can just buffer the CLK at key points to decrease line length so hence there will be no reflections. I can also series terminate each clock line.


The main point is that my buses are just data lines and can settle before the clock comes. However, please tell me what is the best termination scheme for this.
 

crutschow

Joined Mar 14, 2008
27,025
If you sample the bus after the reflections have time to settle than you could likely use no termination or just a single parallel termination at the end.
How long will the bus be?
 

Thread Starter

AnalogDigitalDesigner

Joined Jan 22, 2018
121
If you sample the bus after the reflections have time to settle than you could likely use no termination or just a single parallel termination at the end.
How long will the bus be?
About 48 inches long! It winds all around two wire-wrap boards. It's a pity. Here's a photo of the card-cage and boards. This is just a mock-up. The boards won't be that far away from each other.

Single Parallel term. at the end? I have 2 kinds of buses. One has many drivers and one receiver, the other has a single driver and many receivers. So they require 2 different termination schemes right? The question is.. which type is best for both kinds... ?

For the type2 bus (single driver), I am sure I can use a single series termination at the driver. (Correct?)

For the type1 bus (many drivers), it's more complicated. I thought I should use a parallel termination (going to 2.5V) at the receiver, and another parallel termination at the other end of the bus, but then there are maximum current issues. If I terminate each at 100Ohms that requires 50mA current. What to do ?

 
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Thread Starter

AnalogDigitalDesigner

Joined Jan 22, 2018
121
What if I terminate both ends of my (many drivers one receiver) bus at 250 Ohms, and a voltage of 2.5V. Then the driver will see a termination of 125 ohms, going to 2.5V. That will require a current of 20mA, which is the maximum current for 74HC. Would this be any good? It's hitting the limit....

What other possibility would be feasible? AC termination? But how to calculate the capacitor value ?
 

ebp

Joined Feb 8, 2018
2,332
If it is all wire wrap or mixture of wire wrap and printed circuit boards it will have more reflections than a house of mirrors. At 48 inches, even with HC devices there may be pretty severe problems. It is likely that nothing will even remotely resemble a constant impedance transmission line.

No one has mentioned stubs. Make that had mentioned.

In most logic families there are devices designed for use as clock drivers that can source and sink substantially more current than regular parts. With HC, you can parallel gates, buffers, inverters, etc. with other identical devices in the same package for lower source impedance.

Where a fast clock must be distributed to many points it is common to use a multi-output clock driver from a master clock signal, keeping in mind that propagation delays may need to be considered carefully.

There should be plenty of information on transmission lines, drivers, receivers, termination methods, passive and active clamping methods, etc. readily available on the web. I strongly recommend you spend several hours finding and studying this information. Lots of good things have been published by manufacturers of logic devices.
 

Thread Starter

AnalogDigitalDesigner

Joined Jan 22, 2018
121
If it is all wire wrap or mixture of wire wrap and printed circuit boards it will have more reflections than a house of mirrors. At 48 inches, even with HC devices there may be pretty severe problems. It is likely that nothing will even remotely resemble a constant impedance transmission line.

No one has mentioned stubs. Make that had mentioned.

In most logic families there are devices designed for use as clock drivers that can source and sink substantially more current than regular parts. With HC, you can parallel gates, buffers, inverters, etc. with other identical devices in the same package for lower source impedance.

Where a fast clock must be distributed to many points it is common to use a multi-output clock driver from a master clock signal, keeping in mind that propagation delays may need to be considered carefully.

There should be plenty of information on transmission lines, drivers, receivers, termination methods, passive and active clamping methods, etc. readily available on the web. I strongly recommend you spend several hours finding and studying this information. Lots of good things have been published by manufacturers of logic devices.

I'm afraid you are exagerating.... There is a similar project here: http://www.homebrewcpu.com/

I know the creator, and he didn't even bother to terminate his data buses. And his build works at 4MHz. Wirewrap all the way.

You also didn't answer my question about what kind of termination would be best to use in my case.
 

Thread Starter

AnalogDigitalDesigner

Joined Jan 22, 2018
121
CHANGE:

my bus will not be 48 Inches! I will actually put a 244 buffer right in the middle, to cut the length down in half. The reason I said 48 is that that is the total for 2 boards. When taking the bus from one board to the next, I will first run it through a buffer, so the length will be half of that in each board.

Then in each board I might reduce further.

One question I have is this. What if I put a tristate buffer in the middle of the bus such that when a driver to one side of it is on, I open the buffer, and when a driver to the other side of it is on, I close the buffer? This virtually reduced bus length.

If I terminate both ends parallely, at 200 Ohm into 2.5V, then effective 100 ohm termination at 25mA current will be seen. 244's can drive up to 25mA, so am I fine if I do this?
 
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Thread Starter

AnalogDigitalDesigner

Joined Jan 22, 2018
121
If I terminate both ends parallely, at 200 Ohm into 2.5V, then effective 100 ohm termination at 25mA current will be seen. 244's can drive up to 35mA, so am I fine if I do this?
 

Thread Starter

AnalogDigitalDesigner

Joined Jan 22, 2018
121
Another idea I have is this: I split the bus up using 244 tri-state buffers. And I only open a buffer if a driver behind it is driving, etc. The image below illustrates. Does this make sense? I am effectively decreasing the bus length considerably. Please comment!
 
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