Hi

Please have a look on the attachment. Please help me with the query there. Thanks a lot.

Regards
PG

 

It's still a counter, it just doesn't cover the full-count. If the device ends up in state 11 (by a glitch) then it just resets.

 

Thank you.

Okay. That means full count could be from 00, 01, 10, 11, but it doesn't cover the last value. By the way, what kind of glitch that could be?

Best regards
PG

 

ESD is one way that a circuit could end up in an invalid/unused state. Typically you want these unused states to simply transition back to reset (00).

 

Thank you for the information.

Best regards
PG

 

Hi

Please have a look on the attachment. Please check if the part (a) is correct, and please answer the questions related to part (b) so that I can proceed to implement the function. Here is the scan from the solution manual (to someone who doesn't know, it has been found that mostly solution manual gives wrong solution). Thank you very much.

Regards
PG

 

Part a is correct.

Your assessments are correct. When we use the summing symbol Σ, we refer to the SoP form, whereas the multiplication symbol Π, refers to the PoS form.

 

Your assessments are correct. When we use the summing symbol Σ, we refer to the SoP form, whereas the multiplication symbol Π, refers to the PoS form.

I'm sorry to ask this again. So, is it really so, F'(A,B,C,D)=Ʃ(3,8,12,15), for the the function F in the attachment. Thanks.

Best regards
PG

 

Yes, F'=Σ(3,8,12,15), for part b.