I am looking at the circuit above. Can someone explain the operation or purpose? Is this a common circuit?

To me it looks like a slew rate reducer. Lets say we have .5 V at the non inverting terminal. The gain will be one until C35 saturates. As C35 charges the current through it will lower, so the op amp will start to see the gain circuit without C35. So the gain increases again and the output will raise. But when it raises again C35 starts to see current, again. Anyone disagree with my thoughts? Thanks for the support.

 

how do you propose to "saturate" c35? it looks more like a high frequency roll off filter.

 

Looks like a Non inverting low pass filter.

 

Looks to me like the intent is insert a pole in the frequency response; rolling off high frequency gain when Xc=220K.

 

For low frequency the circuit gain is Av1 = 1 + (R82+R20)/R19 = 222 V/V
But as signal frequency rise the capacitive reactance Xc decreases and for frequency when Xc = R82 --->Fpole ≈ 154Hz gain start to drop at rate -6dB per octave. And at Fzero = Xc = (R20+R19)||R82 -->17kHz gain will settle down at 1+R20/R19 = 2 V/V

 

Here's a quick rule to evaluate these weird looking op amps: look at the gain at DC and infinite frequency.

At DC a cap looks like an open, so we have 220K + 1K in the feedback, 1K at the input, so the gain is 221/1+1 or 222.

At infinity the cap looks like a short so there is 1K in the feedback 1K at the input, so the gain is 1/1 + 1 or 2.

Something with lots more gain at low frequencies as opposed to high frequencies is defined as a low pass filter.

This will have two breaks, first where Xc = 220K where the gain starts to roll off, and the next at Xc = 1K where the gain levels out.

 

Looks to me like the intent is insert a pole in the frequency response; rolling off high frequency gain when Xc=220K.

Bingo.

Not to beat a dead horse: but another way to look at it - The gain is nominally 222 at low frequency. A pole [f=1/(2*pi*c*220k)] then begins to reduce the gain... then a zero [f=1/(2*pi*c*1k)] sets the gain to 2 until the dominate pole [found in the datasheet] of the opamp begins to dominate, reducing the gain further.

You typically see these types of variable gain vs. frequency stages on error amplifiers within control loops. This particular type is especially popular when controlling inductive loads.

 

Tindel, what software did you use to get that screen shot, please?

 

I use LTSpice for the simulator. http://www.linear.com/designtools/software/

I use 'screenshot' application in ubuntu 15.10 for the screenshot.

I believe windows 8 and above will let you use 'windows key'+'print screen' to save the screen shot to your desired photo folder.

 

Can someone explain the operation or purpose?

Just think of the capacitor as a "resistor" whose resistance varies with frequency.

 

then a zero [f=1/(2*pi*c*1k)] sets the gain to 2

I disagree, the "ZERO" is at frequency when Xc = (R20+R19)||R82 ≈ 0.16/(4.7nF*2kΩ) ≈ 17kHz not at 0.16/(4.7nF*1kΩ) = 34kHz.

 

I disagree, the "ZERO" is at frequency when Xc = (R20+R19)||R82 ≈ 0.16/(4.7nF*2kΩ) ≈ 17kHz not at 0.16/(4.7nF*1kΩ) = 34kHz.

Yep - you're right - forgot to include R19 in the zero. Silly error.

 

Thank you for all of the replies! That makes a lot more sense.