Can someone with more experience of using 4000 series ic's explain what is going on with a very simple circuit. Those in the know won't need a schematic as it is self explanatory. I have a CD4047B wired as a standard astable running at around 100Hz driving a CD4041ub.
The astable works fine with a supply of 4.5 to 15 Volts, but the output from the unloaded CD4041 collapses as the supply is increased above 7.5 volts although the spec sheet shows it should also be fine at 15 Volts.
Pins 3,6,10,13 are linked and used as inputs, 1,4,8 11, are the outputs, 7 is -ve, 14 is +ve. There is a 1mfd tantalum and 100nf ceramic capacitor decoupling the supply pin to each chip, a 100mfd electrolytic close to both i.c's across the supply input, and I have tried using two different lab power supplies.
Driving a CD4049 or CD4050 in a similar fashion works with no problems up to 15 Volts.
The circuit is to be used purely as a pulse generator to test logic circuit experiments, with 5 volts supply it will drive ttl ic's, but I want the option to drive Cmos as well.
I have tried two more CD4041's with the same result, they were supplied new from R.S supplies and not from any dubious source.
I'm sure there must be something simple I am overlooking, but I do not have a lot of experience with working with logic I.c's.

 

I would assume that you made a typo in your post.
The outputs should be 1, 4, 8, and 11?

 

And both ICs are fed the same supply voltage?

 

.... and you don't have any inputs floating?

 

If you leave any inputs floating with CD4000 circuits, that can cause a high supply current and overheat (and possibly damage) the chip, especially at higher supply voltages.
That could cause the behavior you are seeing.
I've had that happen in a circuit when run at 15V.

 

Those in the know won't need a schematic as it is self explanatory.

It isn't self explanatory without requiring someone to look up the pin outs and wade through your description of how things are connected.

I use CD4xxx logic, but I don't bother remembering pin outs.

the output from the unloaded CD4041 collapses as the supply is increased above 7.5 volts although the spec sheet shows it should also be fine at 15 Volts

What does collapse mean in this context?

 

I would assume that you made a typo in your post.
The outputs should be 1, 4, 8, and 11?

ooops! yes should be pin 11
I've corrected the original.

 

It isn't self explanatory without requiring someone to look up the pin outs and wade through your description of how things are connected.

I use CD4xxx logic, but I don't bother remembering pin outs.

What does collapse mean in this context?

Collapse as in, as the voltage is raised, the output waveform distorts a little between 7.25 v -7.4v and drops to zero at 7.5 and above.

 

Collapse as in, as the voltage is raised, the output waveform distorts a little between 7.25 v -7.4v and drops to zero at 7.5 and above.

Input voltage? Supply voltage?

What does distort mean in this context?

 

If you leave any inputs floating with CD4000 circuits, that can cause a high supply current and overheat (and possibly damage) the chip, especially at higher supply voltages.
That could cause the behavior you are seeing.
I've had that happen in a circuit when run at 15V.

As far as I can tell, all the inputs are being used although I'm not sure what should be done with pins 2, 5, 9, 12. they are both combined unused outputs and inputs. should they be tied to ground? then how would I get outputs from 1, 4, 8, 11,?
It's a differently configured chip compared to the 4049/4050

 

.... and you don't have any inputs floating?

only the combined output/input pins 2, 5, 9, 12.

 

Input voltage? Supply voltage?

What does distort mean in this context?

Yes supply voltage. The leading and trailing edges of the square wave round off a very little followed by complete collapse to zero (0 not 1)

 

2, 5, 9 and 12 are output-only (the transmission gate shown in the schematic is a means of delay equalization). They should be left open circuit if you are not using them.

Looking at those outputs may provide a clue to what is wrong. Each of those output should be complementary (opposite state) to the outputs you have tied together.

Assuming you are working on a breadboard, I would proceed by disconnecting the outputs you have tied together from each other and checking them individually. If they all look OK, then I'd start with two tied together then 3 then 4.

If you are working on a plug-in breadboard, it is always worth scoping the pins right on the pins - including power and ground. It isn't uncommon to have a pin bend up under the body of the part when you plug it in - it's hard to see and of course makes things not work as expected.

[EDIT - added:] Because of the protection diodes on CMOS inputs, it is actually often possible to power the whole chip from an input signal if the supply pin is not connected. Sometimes the circuit works perfectly well, sometimes not. Of course this isn't something you should do by intent, but something that does happen and makes troubleshoot a little more "interesting."

 

Yes 2,5,9 12 are not connected, no pins bent up as I tried other i.c's. I will try one gate at a time later and report back. During fault condition, the input from the 4047 astable is still present and does not distort, only increases in amplitude as the supply voltage is raised.
I built the same circuit on another board and the same thing happens. By re-configuring to for the different pin-outs, using a 4049/4050 everything is fine so I may just use them instead. I would hate to not resolve the problem though. from what I read, the 4041 is the better choice for a ttl buffer when a large fan out is needed.

 

looks like the TS should post a schematic...

 

looks like the TS should post a schematic...

It's so simple, it's a quad ttl buffer with the inputs in parallel and the outputs in parallel. It is driven by a square wave from a standard cmos astable that is quite happy driving other logic I.c's. There seems to be some peculiarity with the 4041 that refuses to operate with a supply voltage that exceeds 7.25 volts.
Doing the same with a CD4049 or 5050 which are hex buffers and ttl drivers works perfectly so I am left wondering, what apart from the pin-outs, is the difference that is causing the effect?

 

If it is a TTL buffer, why is it running on 7.5 V?

Those in the know won't need a schematic as it is self explanatory.

Actually, those in the know know that *nothing* in electronics is self-explanatory, ever. Ever. E.V.E.R.
Of the millions of integrated circuit types and variations in use, I keep the pinouts and internal schematics of only a few hundred thousand in my head. Sorry I can't be more help. Maybe someday I'll be in the know.

ak

 

Well as it seems that some are confused by what a Quad ttl buffer is, (a basic logic ic building block) let us close the thread and once I've worked out what is happening myself, I will keep it a secret and happily continue with the project.
I don't need any help with the pin outs, they are in the data sheet. It is the strange behaviour of this particular IC that I was questioning. If you just want to make comments without taking the time to look at my question, maybe even check it's data etc, then unhelpful comments are not welcome!
To those who actually offered constructive advice, I thank you.

 

Well as it seems that some are confused by what a Quad ttl buffer is

We are not confused but you seem to be
TTL is bipolar logic, not CMOS, and can't operate above 6V.

The strange behavior is likely due to a wrong connection on your circuit but, since you refuse to post a circuit schematic, we can't really help you further.

 

We are not confused but you seem to be
TTL is bipolar logic, not CMOS, and can't operate above 6V.

The strange behavior is likely due to a wrong connection on your circuit but, since you refuse to post a circuit schematic, we can't really help you further.

then i suggest that you look up the device as it is specifically designed to interface between cmos and ttl
As for a circuit, surely I don't need to draw a hex buffer with the inputs tied together and the outputs tied together but obviously some are confused by that