Hi,
I have built a high side switching circuit using a PNP BJT driven by an NPN BJT. The design intent is to switch 30 VDC (supplied by a boost converter) at 1-10 kHz using a 5V Arduino signal.
My rise times at 10 kHz look very good, but the fall times are slow. What is causing this? How can I reduce the fall times?

My circuit layout is here (Falstad) and I calculated the resistors below:

# SUPPLY
V_s = 30 # supply voltage
i_s_MAX = 0.120 # maximum forward current of pulse

# MICROCONTROLLER
V_MICRO = 5 # 3.3

# Q2: 2N3906, https://www.onsemi.com/pdf/datasheet/2n3906-d.pdf
V_CE_SAT_Q2 = 0.25 # 0.4 collector-emitter saturation voltage
V_BE_SAT_MIN_Q2 = 0.65 # minimum base-emitter saturation voltage
h_FE_MIN_Q2 = 100 # only relevant for amplifiers; use minimum
ODF_Q2 = 5 # overdrive factor to account for temperature changes and ensure we stay in saturation region

# Q1: 2N3904, https://www.onsemi.com/pdf/datasheet/2n3903-d.pdf
V_CE_SAT_Q1 = 0.2 # 0.4 collector-emitter saturation voltage
V_BE_SAT_MIN_Q1 = 0.65 # minimum base-emitter saturation voltage
h_FE_MIN_Q1 = 100
ODF_Q1 = 5 # overdrive factor to account for temperature changes and ensure we stay in saturation region

R_5 = (V_s-V_CE_SAT_Q2) / i_s_MAX # resistor connected between V_s and the Q2 collector to limit current through the load
R_5 = 247.9 -> select 270 Ω

i_B_Q2 = (i_s_MAX / h_FE_MIN_Q2) * ODF_Q2 # base current to saturate Q2
i_B_Q2 = 0.006 A

R_3 = (V_s-V_BE_SAT_MIN_Q2) / i_B_Q2 # resistor connected to Q2 base to limit current; use next lowest commonly available
R_3 = 4892.7 -> select 4700 Ω

i_B_Q1 = (i_B_Q2 / h_FE_MIN_Q1) * ODF_Q1
i_B_Q1 = 0.0003 A

R_1 = (V_MICRO-V_BE_SAT_MIN_Q1) / i_B_Q1 # resistor connected to Q1 base to limit current; use next lowest commonly available
R_1 = 14500 -> select 10k Ω

R_2 = 100e3 Ω
R_4 = 100e3 Ω

 

Bipolar transistors recover really slowly from saturation.
R2, R4 and R5 need to be much lower values.Try 10k, and see how much difference it makes.

 

Below is the LTspice simulation of the circuit with some changed resistor values that reduced the fall-time.
There is still about a 2µs storage delay during turn-off.
If you need to reduce that further, you will likely have to use some faster switching transistors, which may be difficult to find with that high a voltage rating.

 

Thanks for the responses! I will give these a try.
I am trying to improve my electronics skills and was trying to follow an analysis methodology to determine the resistor values. For my understanding, can you please explain how to determine that these values are better for reducing fall time? Is there a specific resource you can point to, or were these recommendations the result of experience in the field?
Thanks!

 

Hi,
try to shunt R1 and R4 with small capacitors, say 1 nF

 

What is the actual load? If it is not the resistor you use in the simulation, you will have to adjust the resistors again.

 

how to determine that these values are better for reducing fall time?

There are collector and base parasitic capacitances that must be rapidly charged and discharged, so resistors must be small enough to do this.
Note that the transistor supplies current to charge the collector capacitance when it turns on, but supplies no current when turned off.
For example, the 100kΩ collector load resistor you used for R5 is way too large to provide a rapid discharge of the collector capacitance.

The base current should be about 1/10th of the collector current for good switching saturation.
But this saturation creates excess charge in the base, and the transistor storage time is determined by how long it takes the remove this excess charge, which can be sped up by:

• Use a small base-emitter resistor, allowing the charge to dissipate faster.
• Add a small capacitor across the base input resistor (e.g. a few hundred pF).
• Add a Schottky diode between the base and collector (called a Baker clamp) which prevents the transistor from going into hard saturation, reducing the amount of stored charge (such as used in Schottky TTL IC's).

If you google transistor switching time, and transistor storage time, you will find some references on this.

 

We don't know the actual characteristics of the probe. If it is at all capacitive, then the only thing discharging that capacitance is the probe's unpowered impedance, shown as 100 K. From the scope shot, it looks like the fall time is around 20 microseconds. If the probe had an intrinsic input capacitance of just 67 pF, the fall time to 5% of peak value (three time constants) would be 20 microseconds. OTOH, the falling edge trace looks more linear than logarithmic, suggesting that something more complex might be going on,

If it won't cause a problem with the probe, put a 1 K resistor in parallel with it. This will draw an additional 30 mA from the PNP source, but a 3906 can handle that easily. Along with the decreased value of R4, things should be much more snappy.

Depending on how long the probe is powered on, the added resistor might have to be a 2 W part. If a 1 K resistance is somehow too low, or 2 W is too much to dissipate, try 4.7 K or 10 K - anything to discharge the probe's stored energy and yank the Q2 collector down to GND..

The power dissipated in the added resistor is E^2 / R. For a 1 K resistor, that is 0.9 W. For good reliability and a lower body temperature, use a resistor rated for at least twice what it will be dissipating. If the probe is being pulsed, then the power being dissipated is decreased by the duty cycle. For example, if the probe is on for only 10% of an on/off cycle, this reduces the average power dissipated in the resistor to 0.09 W, easily handled by a standard 1/4 W resistor.

What are the on and off time periods for the probe?

ak

 

You might find it interesting to replace Q2 by a small MOSFET and compare the switching times.