I would really appreciate some help with the following...I'm trying to wire a counter on a breadboard that counts in a specific sequence ( 2,6,7,5,1,8,0 ). I figured out the Logic Form and the JK Logic Programming part, but still fuzzy on K-Maps and how to wire the logic gates. If someone could help me with the wiring schematic, I would be very grateful. Thank You.

I'm working with the following...

555 Timer ( Working )
Man72 Seven Segment Display wired to a 7447 ( Counts 0,1 )
2 JK Flip Flop Chips ( 4 JK Flip Flops Total )
1 Quad AND Gate Chip ( Can use others if need be )
1 Quad OR Gate Chip ( Can use others if need be )
Multisim v. 13


Thanks again,


Renick Marsh

 

Is this homework?

 

Thanks for the reply.

This is an extra credit assignment. It was going to be a Final Lab assignment, but the class decided on a written exam instead.
I still want to figure it out for my own knowledge though. Thanks again.

 

You have many ways to go. Note that you only have 7 valid states, so you only really need three flops. The three flops could count in a straightforward binary sequence, like 0,1,2,3,4,5,6,0,1,... and then re-map the flop states to the inputs of the 7447.

 

It sounds like you are pretty close, though you haven't shown any work to confirm this.

You may want to take a look at this thread meant as an addition to the eBook.

 

I've included schematics of two counters I have already completed and the work I've done so far on the specific counter...Not sure how to "re-map the flop states" or were to go from here. Also, I've found a 7490 chip if that helps. Thanks again

 

Have you tried implementing the design you've created? The "Specific Counter.txt" file seems to have the parts, what more direction are you asking for? Minimizing the logic? If so, take a look at the link I posted before.

Regarding mapping count outputs, you can map the outputs using a mod-7 counter (0-6) which maps the outputs to a specific count.
i.e.
0 => 2
1 => 6
2 => 7
3 => 5
4 => 1
5 => 8
6 => 0

This route would require you to have a significant cost on implementing your output-forming logic as well as requiring your input-forming logic.

 

With a little help from my Instructor, I finally figured out the K-Maps and Boolean Expressions. From there I was all good. It took 4 JK Flip Flops and 6 AND gates. I've included a schematic of the drawing I did in Multisim. Thanks again.