Hello , In the lecture shown below at 9:30 the lecturer shows the effect of different values of source impedance.
To me impedance in this case is counted as resistoance becasue we use purely current dividers.
first case when Zs=0 Iy=Ix Vx=0
if capacitorports are connectred to source directly why the voltage across it is zero?

 

He's not saying that the total voltage across the cap is zero, he's saying that the RIPPLE voltage (notice the tilde over the variables) is zero, which is what you would get if the source impedance is zero since the cap voltage is forced to always be the source voltage, which means that there is no ripple at all.

 

Certainly, if the voltage SOURCE impedance is ZERO, the effect of any load current variations on the source voltage will also be zero. (In the real world of non-perfectly regulated sources that is seldom the case) But in textbook theory it happens quite frequently.

 

Probably I need to explain a bit more. Consider that the "voltage source" in the example consists of two parts: A source of some voltage AND a series resistance between that source and the point some distance away, on the other side of that resistance. In the "real world" the point between the acual voltage source and that series resistance is not accessable, and likewise, that series resistance is not "zero", although it may be small enough relative to any resistance beyond that boint to not matter.