Yep, both Vcc and the clk are 5VThe input clock voltage must be the same as Vcc.
Is it?
It looks like you are using only 1V.
The 74393 clock input is active low.Hello, can someone take a look at my simulation settings and let me know what I am doing wrong? For some reason, my counter outputs never change state. Played around with this for about an hour or so, I know there is some setting I am missing somewhere. Any help is appreciated.
Yours works because the voltage source output is either at 5v or 0(GND). So the 393 will see a falling edge transition at its clk input.Below is the LTspice simulation of the circuit:
Don't know why your simulation doesn't work.
View attachment 254716
Perhaps you have a bad model.Thanks for the help everyone. I tried all of the suggestions and this still doesn't work. I wonder why.
Yep, came with the software. From what I've read, the red lines indicate the line is at an indeterminate logic level. I've tried two different counters and have the same issue by the way.Perhaps you have a bad model.
Did it come with OrCad Pspice?
None that I can see.Anything special I need to do in my simulation profile?
by Duane Benson
by Aaron Carman
by Jake Hertz
by Jake Hertz