Chip: 16F1827
IDE: MPLab 8.92
Language: MPASM

I have been trying to use Linear Memory (RAM) accessed by the FSRn registers. Here is a snippet of the code:

InitBuff       ;FSR0 = oldest/lowest filled, FSR1 newest/highest
     movlw     low(0x0A0)     ;start at B1 GPR
     movwf     FSR0L
     movwf     FSR1L
     movlw     high(0x20A0)   ;access Linear RAM
     movwf     FSR0H          ;beginning RAM
     movwf     FSR1H          ;highest filled RAM
;     movlw     0x9F           ;low(FSR1 maximum)
     movlw     0x90           ;0x190= d.240
     movwf     buffsize
PutRCREG
     movlb     0              ;get data to fill ram                       |B0  
     btfss     PIR1,RCIF      ;         "
     bra       $-1            ;         "
     movlb     3              ;         "                                        |B3
     movf      RCREG,w        ;         "
     movwi     ++FSR1         ;ensure empty buffer = 0 good idea??               |B3
     movf      buffsize,w     ;low(FSR1 maximum)
     xorwf     FSR1L,w
     btfss     STATUS,2       ;skip if full
     bra       PutRCREG       ;for testing only
GetRCREG
;     movlw     0xBE           ;0x21^0x9F = 0xBE
     movlw     0xB1           ;0x21^0x90 = 0xB1
     xorwf     FSR0H,w        ;0x21^0x9F = 0xBE
     xorwf     FSR0L,w        ;0x9F^0x9F
     btfsc     STATUS,2
     bra       BuffMT         ;buffer empty
     moviw     ++FSR0
     bra       GetRCREG
BuffMT
     nop
     bra       InitBuff

Sorry that is so messy. Those comments helped me identify the issue. I am trying to start in Bank 1 at address 0x0A0 and going 240 or 256 registers. Thus,0x0A0 + 0xF0 = 0x190. Only the low byte is used for "buffsize."

In simulation (MPLab SIM), I am using UART I/O stimulus with register injection from a message file that begins with 0xFF x3 followed by values 0x00 to 0xFF by 1's.

Everything looks fine in the Watch window. FSR1 counts up from 0x20A0 (the '2' is to access linear memory) as expected to the calculated endpoint, i.e., 0x2190 or 0x219F, as the message file is loaded.

The problem is when I read out and monitor FSR0. It counts up just fine for the first 200+ entries, then at 0x2170 it fails and reports only zeros. I looked at the file registers (attached) and found that despite what FSR1 shows in the Watch window, registers starting at 0x120, not 0x0A0 are being filled. Thus, I am running out of memory at 0x24F (contents = 0xC8). Register 0x24F is the end of linear memory.

Question: Why isn't RAM memory starting at 0x0A0 being filled?

The only other RAM being used is Common RaAM at 0x70, No other General Purpose Ram is being used. Is this just a simulator issue?

I thought I would post this for the night owls. In the mean time, I will be modifying the code to start at 0x020 and see if that works and will update accordingly. That may be a few hours , as I am still up from early July 4th.

John

 

Started the save at 0x20 and the full table loaded and unloaded as fully. Load began at 0x048 rather than 0x020, however:



0x0A0 was not skipped. My best guess is an artifact of the simulator. General Purpose ram is used nowhere in the program, but Common Ram (0x70) is.

 

Can't quite make out what you were trying to do, John. Were you having trouble translating physical to linear addresses? Or was it another Simulator short-coming?

Does the linear address map for 16F1827 look something like this?

;''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''
;  Linear RAM address space (376 bytes)
;
;  0x2000..0x204F = 0x020..0x06F (80 bytes, bank 00)
;  0x2050..0x209F = 0x0A0..0x0EF (80 bytes, bank 01)
;  0x20A0..0x20EF = 0x120..0x16F (80 bytes, bank 02)
;  0x20F0..0x213F = 0x1A0..0x1EF (80 bytes, bank 03)
;  0x2140..0x216F = 0x220..0x24F (48 bytes, bank 04)
;
#define rxbuff 0x2080   ; Rx buffer address
#define rxsize 32       ; 32, 64, or 128 bytes

;''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''

 

I think that is the problem. I was using the starting addresses of GP ram instead of the linear address you show. That section in the datasheet seems a bit obscure even for Microchip:



I will try it again with the linear addresses you calculated. However, from the behavior I noticed when switching to 0x2020 as my desired start and finding it actually began at 0x2040, I am sure your explanation is right. Thanks again.

I am playing with a FIFO buffer, but that is just a tool. My real purpose was getting experience with linear memory.

EDIT: Tested starting at linear address 2050 and here are the first few lines starting at register address 0x0A0:

Never a doubt.

 

@jpanhalt
FWIW, here is a table of banked vs. linear addresses to check your math. It's for the 16F1784 but the basic addressing is the same. First column in each bank is the decimal equivalent of the banked address and may be ignored.

 

Thanks John,

Mike's table in #3 was sufficient to re-align my thinking. Everything worked well thereafter. My error was simply in misinterpreting the Microchip note, which I find not hard to do. Why Microchip doesn't show such mapping the way Mike did it and insists on using what it typically does (my post #4) is just part of life. It is a great company, but its descriptions are notably void of examples when they would be simpler, and yet it has examples for very old and obvious stuff IMHO.

My code had no purpose other than to stuff the registers and see what the results were. That code has no other intended function. Using the UART and a message was simply an easy way to test it.