Good day AAC! New member here, with a circuit question that may seem trivial, but that I have had no luck solving so far (and I have tried. A lot.).

Onto the problem: It's quite simple. From a 5v square pulse I require circuit that generates a slow ramp to a maximum value of 2-4v during this pulse, and deramps quickly when the 5v pulse goes back to 0v. To give you an idea of the timescales, the slow ramp is on the order of 100ns to reach its max value, and the deramp is as fast as possible, preferrably less than 5ns to get back to ~0v. The ramp would ideally be linear and stop at some value between 2v and 4v, the deramp can have whichever shape as long as it goes to 0v, or a value below 1v, as long as it is reaches this value quickly and is stable. It's not a one-shot thing, so I can't have the previous pulse affecting the next one, for example by shifting the start level of the ramp. The ramp has to be quite well-defined and not change from pulse to pulse. As long as the start value of the ramp, the ramp shape, and the deramp end value are all constant from pulse to pulse, it doesn't matter much exactly what these values are.

I have 5V and -5V rails to work with. I have already attempted the circuit attached, which resulted in a nice slow inverse exponential ramp due to the capacitor charging through the resistor. However, when the 5V pulse ended, the capacitor did discharge quickly, but not all the way to 0V, merely close (to the schottky diode forward voltage drop) and then very slowly decreased to 0v as the capacitor slowly discharged through the closed schottky diode. I get the same result without the transistor. This won't do, as one of the main requirements is that the voltage stays stable after the deramp.

A bit more info: The 5V square pulse comes from a comparator, so it is limited as a current source. The comparator is an ADCMP551. The ramp is fed to the input stage of another ADCMP551. The input capacitance is negligible, 1pF.
I hope this is all the information required and I look forward to hearing your suggestions.

 

Use a diode to control the charging. Or discharging.

 

I'd use an opamp to do slew rate control on the rising edge and short the cap on the falling edge.

 

Two alternatively switched constant current sources? Looks hard to get.

 

Hmmm.... I started trying to simulate this - it ends up not being trivial at these speeds (100ns risetime - 1ns falltime)

 

Ran across this solution quite by mistake. Probably isn't a great solution. I just picked the fastest transistor I could in ltspice program and drove it on and off as quickly as I could.

 

http://forum.allaboutcircuits.com/blog/cookbook-entries.381/#comment-725

Wendy's Index

 

Wendy - Will that hit >~5MHz? sweep rate needs to be ~100ns! I wasn't aware 555's could hit those kind of bandwidths if that circuit can.

Honestly - at this point I would be going to the old tek oscilloscopes and figuring out how they did it. Unfortunately, they used tunnel diodes to trigger their sweeps usually and they are hard to come by.

 

Below is my shot at a circuit.

 

And another.

 

Well, you can use the basic concept. Some 555's are faster than others, a TLC555 (cmos) will hit 2Mhz. Basically a fast constant current source with a discharge transistor similar to the 555 would work fine, and you can get some very fast Schmitt Trigger ICs out there in every family.

You will probably need to amplify the sweep signal, but the trick is to start off with a clean one to begin with.

Speaking for myself, the circuit is so simple I would audition it and see. Specs are where a circuit is guaranteed to work, but many devices will work beyond their rated specs.

I am assuming that linearity is important, hence the constant current source.

I can sketch a analog of the 555 equivalent if you are interested. I don't use simulator, I use the one I was born with between my ears.

 

The npn is at the wrong spot and of the wrong polarity. You want to use it to quickly discharge the capacitor. Your problem is similar to dead time programming on a mosfet driver and see how they solve that problem.

 

Wow, amazing response!

Below is my shot at a circuit.

I quite like this circuit, but unfortunately the ramp comes too late after the rising edge of the 5V pulse. Is there a way of lowering this delay to 10ns or less?

And another.

This looks promising. However, I need the circuit to ramp during the 5V pulse, i.e. the opposite of how it currently work. I assume it's as simple as replacing the n-channel mosfet with a p-channel mosfet, but TINA (the simulation program I use) doesn't seem to have any fast mosfets. Can you recommend one? Also, I'm not a big fan of that initial "dip" at each ramp.

Well, you can use the basic concept. Some 555's are faster than others, a TLC555 (cmos) will hit 2Mhz. Basically a fast constant current source with a discharge transistor similar to the 555 would work fine, and you can get some very fast Schmitt Trigger ICs out there in every family.

You will probably need to amplify the sweep signal, but the trick is to start off with a clean one to begin with.

Speaking for myself, the circuit is so simple I would audition it and see. Specs are where a circuit is guaranteed to work, but many devices will work beyond their rated specs.

I am assuming that linearity is important, hence the constant current source.

I can sketch a analog of the 555 equivalent if you are interested. I don't use simulator, I use the one I was born with between my ears.

I have never worked with the 555 timer, so if you would like to help me out and design the circuit, I'd be grateful.

Anyways, I will keep working, using your suggestions as inspiration.

 

With a minimum output voltage of 0 to 1 V and a max ramp voltage of 2 to 4 V, I think the solution is a constant current source (made from two *very* fast transistors) that is always on, and a very fast switch shorting out the capacitor. A 74S06 or 07 open collector inverter/buffer has an output fall time of 2.5 ns, but that probably is limited by the DIP package.

How linear does the ramp have to be? A single resistor to a +24 V source charging a capacitor would make a pretty linear ramp for the first 2 volts, which is 10-15% of one time constant.

With a 24 V source and a 2 V ramp, R = 22 K, Iramp varies from 1. 10 mA to 1.00 mA, and C = 50 pF. ish.

Also, what circuit impedance do you need, or what is the load impedance on the ramp voltage?

ak

 

With a minimum output voltage of 0 to 1 V and a max ramp voltage of 2 to 4 V, I think the solution is a constant current source (made from two *very* fast transistors) that is always on, and a very fast switch shorting out the capacitor. A 74S06 or 07 open collector inverter/buffer has an output fall time of 2.5 ns, but that probably is limited by the DIP package.

How linear does the ramp have to be? A single resistor to a +24 V source charging a capacitor would make a pretty linear ramp for the first 2 volts, which is 10-15% of one time constant.

With a 24 V source and a 2 V ramp, R = 22 K, Iramp varies from 1. 10 mA to 1.00 mA, and C = 50 pF. ish.

Also, what circuit impedance do you need, or what is the load impedance on the ramp voltage?

ak

Thanks for the reply, but I have already solved it with help of the circuit that Ronv posted above. Thanks for your suggestion though!

 

Thanks for the reply, but I have already solved it with help of the circuit that Ronv posted above. Thanks for your suggestion though!

It would be nice to see your final circuit. Just for the record of this thread.

 

Agreed, I would like to see your final circuit.

You will note that a lot of use are using similar approaches, the fast constant current source (the 555 circuit has one) and a discharge transistor. The rest is just details.

 

.... and the Devil is in the details (e.g. transistor choice, pcb layout) when aiming for a 5nS discharge time .