I think i know where I've gone wrong. I haven't implemented the circuit with both the comparators and the logic equations from the kmaps. The one I simulated was just based on the kmap logic. So I should implement the logic of the kmaps and the comparators together, right?

 

In the end you need to have it altogether. As you are testing things you can emulate the output of the comparator circuit with just a logic signal you control.

 

is this how it's supposed to be connected? i have the cascaded comparators connected to the 3 generated numbers and the kmap logic for each generated number as well.

and i hope the images come out better.

 

It looks like you've addressed most of my concerns, but it is hard to tell. Here is the quality of the image as I have it.

Not only can't I read the pin names, but I can't tell which wires are connected and which aren't.

 

Would you know any site or possible method of me sending you the actual circuit and file to make things easier?

 

Its doubtful that I have compatible software. You should be able to get decent screen captures without too much difficulty. If things are clear on the screen, then capture the image into a file (PNG is preferred) and then view the file on your machine to get a good idea of what it will look like. How you do screen captures is very dependent which operating system you are using. There are also numerous third-party capture utilities out there -- some free and some not. Another alternative is to print your schematics to a PDF file. Again, how you do this is dependent on your system, but there are numerous free PDF print drivers that look to your system like a printer but the output actually goes to a PDF file. These can produce large files, so be aware of that.

 

Alright. I'll try to figure something out.

Anyway, let's assume the connections are correct. Where do I go from here? What do I do with the comparators and the kmap logic?

 

As mentioned before, you have five pieces of information from which you need to determine the payout amount. You have one input, from the comparator circuit output, that tells you whether you have a winner at all. Then you have the four outputs from one of the counters.

Given what you have learned about how this information can be combined, produce a K-map for each of the three outputs that you need. The draw a logic circuit that does ONLY this task -- takes those five inputs and produces those three outputs.

 

let's assume the connections are correct.

Your choice of colors produced poor contrast. The part that WBahn posted, looks like all the crossing wires are connected.

You can specify a drawing size to a pdf file ... if you wanted a larger version. Then upload that pdf file.

 

As mentioned before, you have five pieces of information from which you need to determine the payout amount. You have one input, from the comparator circuit output, that tells you whether you have a winner at all. Then you have the four outputs from one of the counters.

Given what you have learned about how this information can be combined, produce a K-map for each of the three outputs that you need. The draw a logic circuit that does ONLY this task -- takes those five inputs and produces those three outputs.

Let C be the comparator output of "AeqB" which only functions when all 3 digits are equal.

whenever C=0, the circuit should not function, therefore all outputs where C=0 are 0. (At first I thought this should be "don't cares" but I believe I'm mistaken)

When C=1 is when the circuit should function.
So I've come to the idea that the kmap logic of each payout (20,200,999) should each be connected to a separate 2 input AND gate (3 in total) with the other input connected to C.

The circuit would then only function when C = 1, and the kmap logic, depending on the number that is generated, would dictate whether the payout would be 20,200 or 999.

 

Let C be the comparator output of "AeqB" which only functions when all 3 digits are equal.

whenever C=0, the circuit should not function, therefore all outputs where C=0 are 0. (At first I thought this should be "don't cares" but I believe I'm mistaken)

When C=1 is when the circuit should function.
So I've come to the idea that the kmap logic of each payout (20,200,999) should each be connected to a separate 2 input AND gate (3 in total) with the other input connected to C.

The circuit would then only function when C = 1, and the kmap logic, depending on the number that is generated, would dictate whether the payout would be 20,200 or 999.

This is a perfectly viable approach and, from the standpoint of resulting in a circuit that is easily to understand, test, and troubleshoot, has a lot going for it. It probably won't result in the fastest or cheapest circuit, but that is not always the driving factor (and sometimes, of course, it is the primary driving factor).

So proceed on this basis and let's see what you get.

 

the results came out great. the comparing and payout circuit function properly.

now my next questions is how do i stop the clock or counter? right now, i'm just stopping the actual simulation. When the counters start working, and say it hits a winning combination, the payout automatically shows the winnings. To be as realistic as possible, i want to let the simulation run and stop the circuit/counter/clock and then show whether it is a winning combination or not.

i hope the images are better as well. i apologize. all i know is print screen, paste on paint and crop.

 

You need to tie the unused inputs of your JK flip flops to appropriate logic levels. The simulator may let you get away with this, the real world won't.

You don't want your three counters running at the same speed. You want them running at significantly different and non-related speeds. So perhaps 13.3kHz, 17.1kHz, and 23.7kHz.

You could stop all three counters with a single signal that gates each of the clocks using the same approach that the "winner" signal gates the payout display.

 

for the JK flipflops, most of my untied pins are SET, RESET and Q'. so should i just connect all of them to ground?

the same clock speed was just to check if all the winning combinations came out right. they are set at 17, 23 and 29 khz, respectively.

i still don't quite understand how to do the "switch" to stop the clock.

 

for the JK flipflops, most of my untied pins are SET, RESET and Q'. so should i just connect all of them to ground?

Remember, you only tie unused INPUTS to a known state. Do not tie unused OUTPUTS -- leave them floating unless you have a damn good reason not to. If your SET and RESET inputs are active HI, then tie them LO. Many real flip flop ICs have active-LO sets and resets, so those you would need to tie HI.

the same clock speed was just to check if all the winning combinations came out right. they are set at 17, 23 and 29 khz, respectively.

Good.

i still don't quite understand how to do the "switch" to stop the clock.

It's the same idea with how you overrode your payout signals.

You have two signals -- a clock and a control signal -- that go into a black box. Out of the box comes a different clock signal. Let's call the input signals CLKIN and RUN and let's call the output signal CLKOUT. When the RUN signal is LO, you want the CLKOUT to be LO. When RUN is HI, you want CLKOUT to be equal to CLKIN. So put up a truth table for what the black box has to do given those two inputs in order to produce the desired output.

 

i attached a picture of the truth table.

CLKOUT only functions when CLKIN and RUN are both HIGH, therefore like an AND gate.

so should i use the CLKIN as one input, then the other input is a switch that goes from high to low, which is my control signal?

 

i attached a picture of the truth table.

CLKOUT only functions when CLKIN and RUN are both HIGH, therefore like an AND gate.

Yes. Do you see how this is logically the same thing you are doing with the signals for the payouts?

so should i use the CLKIN as one input, then the other input is a switch that goes from high to low, which is my control signal?

Yes. You need to use a switch circuit that results in the voltage at the RUN input of the three AND gates always being a defined LO or a defined HI. A simple way of doing that is to just use a simple switch (SPST) between the RUN signal and ground. Then place a resistor (10kΩ - value not at all critical) between the RUN signal and the positive logic supply. When you close the switch the circuit will stop running.

You will have switch bounce (look it up), which is normally something that you want to avoid -- in fact often have to avoid -- but in this case it actually helps you because it increases the unpredicability of the outcome.

 

i believe i figured it out already.
the switching circuit is in the picture.

first, i'd like to thank you Mr. WBahn for all your help in this project of mine. i am truly grateful for everything that you've contributed to this. i also appreciate you not exactly spoon feeding me all the answers to my questions, but guiding me and making me think instead.

Thank you so much.

 

Looks pretty good. You only need a single switch, though. Use one switch to produce your RUN signal and then send the same RUN signal to all three AND gates.

I'm glad I could help and I'm particularly glad you recognized the benefit of only providing nudges in the right direction and making you fight and struggle with the details. That is how most of us truly learn best.

 

made the change from 3 switches to 1.

just out of curiosity, why are JK flip flops good or the more common of flip flops to use? i know i could have implemented a counter from any other flip flop, but i hear professors mention that JKs are the more commonly used ones.