Have PROMs gotten fast enough to replace the Sklansky / Tree array of adders? A 4 by 4 adder or multiplier could be implemented with a 256 x 8 PROM. An 8 by 8 with a 1 MB PROM.
The only way to answer your question is to look at the specs for specific chips and do a comparison of access times. In the absence of a physical technology it's logical to assume that a circuit topology that doesn't have to wait for carry bit propagation is the faster circuit. That would be the advantage of the PROM based circuit, but only IF the propagation time of the PROM is better than the two or more propagation times of cascaded adder circuits.
