Good day,
I have to design a logic circuit by symplifying a logic function using karnaugh map(if you simplify the function for me i can take it from there).
The function is the following :
Y2(K,L,G,F)=(K+L’)(FL’+G)
and the don't cares are d(K,L,G,F)=Σ(14,15) .
Please help me out with this one !! Half of my fellow students are asking me how to solve this...
Our deadline is on 13-5-2020 , and we have to deliver this project if we don't want to fail the course.I know my question is to silly but it is really urgent for me to have an answer .
Thank you all in advance

 

hi bio,
Welcome to ACC.
Please post your best attempt at answering the problem, we can then help you.
E

 

Good day,
I have to design a logic circuit by symplifying a logic function using karnaugh map(if you simplify the function for me i can take it from there).
The function is the following :
Y2(K,L,G,F)=(K+L’)(FL’+G)
and the don't cares are d(K,L,G,F)=Σ(14,15) .
Please help me out with this one !! Half of my fellow students are asking me how to solve this...
Our deadline is on 13-5-2020 , and we have to deliver this project if we don't want to fail the course.I know my question is to silly but it is really urgent for me to have an answer .
Thank you all in advance

So YOUR assignment is to simply a logic function, and if WE simplify it for you, you can take it from there? It sounds like "take it from there" involves little more claiming credit for someone else's work.

Here's a blog entry that should give you everything you need:

https://forum.allaboutcircuits.com/ubs/boolean-logic-sop-and-pos-forms.583/

The equations may not render in your browser properly. If so, try a different browser. A few years ago some of the browsers changed their MimeTex rendering engine and it broke a lot of code.

 

Statement: Y(K,L,G,F)=(K+L')(FL'+G)
=KFL'+KG+L'FL'+L'G=KFL'+KG+FL'+L'G (1)
Then I thought , it would be easier too design the logic diagram in order to generate its truth table .
The logic diagram is attached below with the name <<screen(276).png>>
I used this link for the following two actions : http://www.32x8.com/var4.html
The truth table i got was the file screen(277).png.
The karnaugh map that was produced is the file screen(278).png
In this file the variables match as followed :
A=K
B=L
C=G
D=F
Then I applied the don't cares I wanted and used the karnaugh map solver: https://www.charlie-coleman.com/experiments/kmap/
as shown at screen(280).png .
The resulted generic was : f(K, L, G, F) = GF' + LF' + KG
and then I tried to transform KFL'+KG+FL'+L'G into canonical form in order to prove that it is equal with GF' + LF' + KG, which is the most deduced form of this function ...
P.S. I know that it is not advised to design the logic circuit before getting the function on the most deduced form but I'm sure you will understand why I did that. My first attempt was to convert the first form of the given function in the statement to canonical form, but that took me 4 pages of scrap notes which i can't post.
I really appreciate the fact you are willing to help me.

 

the don't cares are d(K,L,G,F)=Σ(14,15)

If there are two don't-care conditions, why does the K-map appear to show three? Also, when you were on 32x8.com why did you not enter the don't-care conditions there and have 32x8 provide the K-map & design the logic circuit?
Also, looking at one of the entries in the Truth Table, it does not seem to agree with the logic function. ???

Y(K,L,G,F)=(K+L')(FL'+G)
Y(A,B,C,D)=(A+B')(DB'+C)
Y(0,0,0,1)=(0+0')(10'+0)=(0+1)(11+0)=(1)(1)=1
Truth Table: Y(0,0,0,1)=0

If you want to design directly from a logic expression, I would recommend using Logisim. (I use Logisim Generic, version 2.7.1) It is a free Java application and comes as a .jar file.