Hi, I'm given a task to design a logic circuit with 4 inputs, A1, A0, B1, B0. The circuit is suppose to compare the value of A1A0 to B1B0 and display the result in 3 outputs, G(A greater than B), E(A equals to B), L(A lesser than B).
eg. A1=1, A0=0, B1=1, B0=1 will produce L=1.

The problem is that i have to design circuit for the output G such that i use less than or equal to 5 gates. Only AND,OR,NOT and XOR gates are allowed to be used.

2 hints are given :

(i) When A1 is Not Equal to B1, and A1 = 1, G will be = 1 (regardless of A 0 and B0)

(ii) However if A1 = B1, then G = 1 only if A0 is Not Equal to B0, and A0 = 1



From the hint, i manage to get 8 gate but not any lower:

A1B1'+A0B0'(A1XORB1)'

i used 3 AND gates, 3 NOT gates, 1 XOR gate, 1 OR gate, which is a total of 8. Anyone could help me with this problem? Thanks in advance.

 

Hi, I'm given a task to design a logic circuit with 4 inputs, A1, A0, B1, B0. The circuit is suppose to compare the value of A1A0 to B1B0 and display the result in 3 outputs, G(A greater than B), E(A equals to B), L(A lesser than B).
eg. A1=1, A0=0, B1=1, B0=1 will produce L=1.

The problem is that i have to design circuit for the output G such that i use less than or equal to 5 gates. Only AND,OR,NOT and XOR gates are allowed to be used.

2 hints are given :

(i) When A1 is Not Equal to B1, and A1 = 1, G will be = 1 (regardless of A 0 and B0)

(ii) However if A1 = B1, then G = 1 only if A0 is Not Equal to B0, and A0 = 1



From the hint, i manage to get 8 gate but not any lower:

A1B1'+A0B0'(A1XORB1)'

i used 3 AND gates, 3 NOT gates, 1 XOR gate, 1 OR gate, which is a total of 8. Anyone could help me with this problem? Thanks in advance.

I'm a little confused here. Perhaps you can help me to help you. In the first paragraph you imply that G, E, and L are a comparison of A and B, where if A = 1 and B = 0, you output G, where A = B, you output E, and where A = 0 and B = 1 you output L, correct?

Is A supposed to be an output response to some combination of A0 and A1. And the same thing for B0 and B1 make B somehow?

This completely changes the answer, so perhaps you could clear it up, because the way you're interpreting the hints could be changed completely if this is true...

-blazed

 

I'm a little confused here. Perhaps you can help me to help you. In the first paragraph you imply that G, E, and L are a comparison of A and B, where if A = 1 and B = 0, you output G, where A = B, you output E, and where A = 0 and B = 1 you output L, correct?

Is A supposed to be an output response to some combination of A0 and A1. And the same thing for B0 and B1 make B somehow?

Let me rephrase my first paragraph:

The circuit is suppose to compare the value of A1A0 to B1B0 and display the result in 3 outputs, G(A1A0 greater than B1B0), E(A1A0 equals to B1B0), L(A1A0 lesser than B1B0).

eg. A1=1, A0=0, B1=1, B0=1 will produce L=1.(In this case, it is comparing 10 against 11(both in binary) thus A<B.)

 

Let me rephrase my first paragraph:

The circuit is suppose to compare the value of A1A0 to B1B0 and display the result in 3 outputs, G(A1A0 greater than B1B0), E(A1A0 equals to B1B0), L(A1A0 lesser than B1B0).

eg. A1=1, A0=0, B1=1, B0=1 will produce L=1.(In this case, it is comparing 10 against 11(both in binary) thus A<B.)

The problem is still confusing to me, I'm sorry. What do you mean greater than? How is 10 less than 11? And is the G you're given hints for the same G in the paragraph above. How does that make sense?

Did you do E and L already? How did you do those?

-blazed

 

I will not do the problem, but I will tell you the process to do it.

#1) Make a truth table
#2) Make a karnaugh map from the truth table
#3) Group all logic 1s together (2s, 2X2, 1X4, etc.)
#4) Write an expression for these grouped logic trues
#5) Or these expressions together
#6) Transform the simplified expressions into logic gates

Steve

 

I hate to bump this ancient thread (nobody likes zombie threads), but there is a much easier way to make this scalable than using a K-map.

Consider the you want to compare two 4-bit numbers, this will end up generating an 8 variable K-Map (an ugly monster if you have ever seen one). Consider the following 1-bit numbers A and B (note ' means the number is primed).
A > B when A and B'
A = B when A xor B' ( or A' xor B if you prefer)
A < B when A' and B

So expanding upon this. For example we can compare two 2 bit numbers through the following (A_0 indicates it is the first number in the series, A_1 would be the second etc.):
A > B when (A_0 and B_0')' and (A_1 and B_1')
A = B when (A_0' xor B_0) and (A_1' xor B_1)
A < B when (A_0' and B_0) and (A_1' and B_1)' ( or when A is neither > or = to B (for simplicity))

And four bits

A > B when ((A_0 and B_0')' and (A_1 and B_1'))' and ((A_2 and B_2')' and (A_3 and B_3'))
A = B when (A_0' xor B_0) and (A_1' xor B_1) and (A_2' xor B_2) and (A_3' xor B_3)
A < B when A is neither > or = to B ( F(A=B)' and F(A>B)' )