if you wish to negate a current vector, the negation will cause the actual vector to flip 180°
thats like marking everything with contrapositive symbols, all the arrows point right but the neg signs mean the actual flow is in opposite direction.
the physical "off" and "on" for a common collector BJT is opposite of 393 input logic.
when input logic is True ( + > -) we get a physical BJT off, no sink. with the series resistors 10k/100k/10k this should leave gate at about 11v
when input logic is False (+ < -) we get a physical BJT on, sink. this pegs fet gate to gnd.
am i wrong, please verify.
sorry to ian, i had swapped out that drive stage to pfet but you quoted me before i could replace the image.
thats like marking everything with contrapositive symbols, all the arrows point right but the neg signs mean the actual flow is in opposite direction.
the physical "off" and "on" for a common collector BJT is opposite of 393 input logic.
when input logic is True ( + > -) we get a physical BJT off, no sink. with the series resistors 10k/100k/10k this should leave gate at about 11v
when input logic is False (+ < -) we get a physical BJT on, sink. this pegs fet gate to gnd.
am i wrong, please verify.
sorry to ian, i had swapped out that drive stage to pfet but you quoted me before i could replace the image.
i do not yet know what opto SSR i will use, some are like 20mA, but with that last schematic i posted i needed to flip the output logic because input logic is Day-on Night-off (but "393 on" is bjt off, and "393 off" is bjt on-sink), hence use of pfet.You are going overboard here. The LM393 can sink 16mA. You're only driving an LED. There is no need for external buffering.
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