signal integrity ringing proper interpretation of VIA S-param

Thread Starter

yef smith

Joined Aug 2, 2020
696
Hello , i have build a structure of two traces and via going threw a plane as shown below.
Its supposed to be purely inductive .
I know there is also place capacitance from the plane .I got Z11 imaginary part very negatice which means that its capacitative trace.
i didnt even put decoupling capacitors. where did i go wrong seeing the inductive behavior of the trace?
Thanks.

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Thread Starter

yef smith

Joined Aug 2, 2020
696
UPDATE:

Hello , I am trying to link S-param to ringing of pulse PDN to QPA2575 amplfier.

To simulate the effect of decoupling capacitors of a basic trace via system connected to IC where i have a 0 to 6V pulse going to the drain.
for that i have build a system in my EM simulator as shown in the attached Video and i got return loss result.
1.did i made the correct assumption described in the video that the load of the PDN is 6V/3A=2 Ohms?
2.for me S22 (return loss) if its low then it good because all energy when inside the system.
but does it mean that my pulse signal at the input when reaching the load will have extra oscillations?
can i see if my return loss is good enough that i will not have ringing?

3.how can i see based on the return loss(S22) if my line is inductive or capacitative, so i could investigate what is the situation?

4. also shown below two photos of Z22 (my input is port 2,the only one) one with Decoupling capacitors and the other without .
maybe they can give insight regarding whether my pulse will not be distorted at the load?
Thanks.

Explanation video is attached in the link below.
https://drive.google.com/file/d/1OptdsOmA0x4sh5rM-Ncy_6XkMsyTW_bN/view?usp=sharing
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