What is the difference in the last output and the serial output of a shift register (ie. 74HC595)? Logically, it seems like they would be the same, but I hooked up 3 595s tying Q8 to to the next register's data pin and it did not work properly. When I switched it to Qs it did.

 

Update: It works fine for a slow arduino program (clock every 200 ms), but seems to break when using arduino shiftOut()

 

What is the difference in the last output and the serial output of a shift register (ie. 74HC595)? Logically, it seems like they would be the same, but I hooked up 3 595s tying Q8 to to the next register's data pin and it did not work properly. When I switched it to Qs it did.

Here's what the datasheet has to say:

Data is shifted on the positive-going transitions of the shift register clock input (SHCP).

The data in each register is transferred to the storage register on a positive-going
transition of the storage register clock input (STCP). If both clocks are connected together,
the shift register will always be one clock pulse ahead of the storage register.


The shift register has a serial input (DS) and a serial standard output (Q7S) for cascading.

It is also provided with asynchronous reset (active LOW) for all 8 shift register stages. The
storage register has 8 parallel 3-state bus driver outputs. Data in the storage register
appears at the output whenever the output enable input (OE) is LOW.

The serial out pin updates on SHCP, and the outputs update on STCP. Look at the 2nd paragraph to see what happens of you clock both with the same clock input.

source: http://www.nxp.com/documents/data_sheet/74HC_HCT595.pdf

 

What is the difference in the last output and the serial output of a shift register (ie. 74HC595)? Logically, it seems like they would be the same, but I hooked up 3 595s tying Q8 to to the next register's data pin and it did not work properly. When I switched it to Qs it did.

Since you chose to keep your schematic secret, it's impossible to give accurate advice. However, if you look at figures 2 and 4 in the above datasheet, you will see that there are two reasons why Q8 and Qs can have different states. What are you doing with the latch and output enable controls?

ak