In this exercise (from our Swedish course literature) we're supposed to design a sequence generator going from 0-6-4-3-2-5-0. The states are supposed to be in BCD, with the state signals as output of the circuit. We also have inputs enable (active high) and set6 (active high), where the set6 input is supposed to generate state 6 (110). My result doesn't line up with the solution from the book. This is my solution on paper, and the solution from the book is in the bottom picture. I have only calculated next state for Q2, and not the other outputs. Since Q2 was wrong I felt no need to go further, since I am apparently missing some key thing. Thanks in advance!




//Max

 

1. What type of flip flop are you using?
2. Is set to 6 supposed to be synchronous or asynchronous?

The format you're using is unfamiliar to me. I'll try to make sense of it after you specify what flip flop you're using.

 

Set6 and enable are supposed to be synchronous. In the exercise the type of flip flop was not specified. But I would assume that it's supposed to be D-flip flops.

Cheers

 

Set6 and enable are supposed to be synchronous.

That is a strange way to draw the truth table. I was taught to put all of the inputs on the left and all of the outputs on the right. You have inputs on the left and on the top of the outputs.

What have you been taught about using don't cares to simplify the logic?

 

You omitted Set6# in the first 3 terms. EDIT: see post #7.


I got a different answer than you and your instructor, but the counter is working correctly in the simulator.

Your instructor's solution allows the counter to be set to 6 when it isn't enabled. That seems wrong to me. When the counter is disabled, the counter shouldn't change.

 

When the counter is disabled, the counter shouldn't change.

??? When counting is disabled, why should preset be disabled?

 

FWIW, your expression works. It looks like you could have simplified the second term if you made use of don't cares for count=7 and you made a mistake in the entry for 1110 (but that could have been a don't care and used for simplifying the aforementioned term).

What you called the correct answer also works.

EDIT:
Looking at my kmap, I saw that I could simplify further by using different groupings. Instead of using 1 2-input and 2 3-input AND gates, I could use 2 2-input and 1 3-input.

I now see how Set6# cancelled out in your stacked 4x4 kmaps. I'm not used to that stacking method so I forgot to cancel out Set6. I just use a single 8x4 kmap.

 

FWIW, your expression works. It looks like you could have simplified the second term if you made use of don't cares for count=7 and you made a mistake in the entry for 1110 (but that could have been a don't care and used for simplifying the aforementioned term).

What you called the correct answer also works.

EDIT:
Looking at my kmap, I saw that I could simplify further by using different groupings. Instead of using 1 2-input and 2 3-input AND gates, I could use 2 2-input and 1 3-input.

I now see how Set6# cancelled out in your stacked 4x4 kmaps. I'm not used to that stacking method so I forgot to cancel out Set6. I just use a single 8x4 kmap.

Cheers for all the help friend!

 

Cheers for all the help friend!

If you have trouble with the problem, feel free to post questions. Are you using a logic simulator for your class? If you are, I can show you how to troubleshoot problems with your solution.

For my information, could you post the entire text of the problem and the solution (including truth tables and kmaps) from your instructor? I'd've thought that your instructor would have tried for a minimal solution, but that doesn't appear to be the case.

I like that you're being taught to use Q2, Q1, Q0 instead of A, B, C (when it should be C, B, A). If you look at datasheets for commercial parts, you'll see that they always use A to be the least significant bit; or they use subscripts with 0 being the LSB.

TI 74LS192 (referencing the logic diagram, you can determine that A is the LSB):

EDIT: posted correct logic diagram for LS192.

Motorola 74LS192 (referencing the logic diagram, you can see that subscript 0 is the LSB):