Scaling down the SPI0 clock value on RPi 3B+/4B

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Joined Aug 30, 2013
I have a custom STM32 MCU board that interfaces with an RPi 3B+ via the SPI protocol. The MCU (STM32F407) has its SPI peripheral clock set at 84MHz and is configured as a slave device. For reliable transmission, the Master (in this case, the RPi) needs to have its SPI clock at 1/2 value i.e, at 24MHz or lower (I read that it needs to be an even number). From what I understand the RPi's SPI clock runs at 250MHz. How can I scale down this clock value?