reduce ripple at the output of the regulator(DC/DC converter)

ronsimpson

Joined Oct 7, 2019
2,067
You have 220nH and 100uF parts so add a LC filter on the output. You can start out with those values but 22nH and 10uF might be enough.
Now you have LCC. 220nh/100uF+100uF Next you will have LCCLC. 220nH/100uf+100uf/22nH/10uF

Looks like you hit current limit at 4A.
 
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Hi all, I am designing a controller, there is a ripple at the output voltage, if I insert a real capacitance at the output with resistance (ESR) and induction influence, how could I eliminate this ripple?

thank you in advance
Best regards
You have 2 options:
- increase the output filtering (while the regulator supports it)
- use a 2nd stage (e.g. linear power controller)
 

du00000001

Joined Nov 10, 2020
100
To be honest: you cannot eliminate the ripple (other than with some quite exotic constructions), you can only reduce it. And there's quite a number of measures to implement:
  • add a reasonably low-ESR and reasonable high capacitance capacitor on the load side
  • add a C-L-C filter
  • if possible: increase the switching frequency

But even when adding a linear regulator you will find out that the ripple cannot be eliminated. (The magic figure in linear regulator datasheets is "PSRR" - Power Supply Rejection Ratio.)

In the end ripple is like having opened a can of worms . . .
 

Papabravo

Joined Feb 24, 2006
18,422
How much ripple can you tolerate, since you can't eliminate it completely, only reduce it to some arbitrarily low value?
This is a fair point. A design should have a set of requirements. Without them you will never know what "done" means, and there is no way to evaluate the quality of what you have designed.
 
I prefer to have a capacitor series resonance point at or below the switching frequency. That way the capacitor effectively is its parasitic inductance to ground at the switching frequency and harmonics of the pulse-width modulated signal. If Lp is the capacitor inductance and Ls is the filter inductance (220nH) the attenuation is like a voltage divider Vripple = Vsw*Lp/(Lp + Ls). Vsw (peak-to-peak) is the fundamental harmonic and is equal to Vin.

Go to Murata's simsurfing website (https://ds.murata.co.jp/simsurfing) and select a capacitor. Then "Frequency Characteristic" and then "|Z|". The series resonance is the lowest impedance. Again, that frequency should be at or below the switching frequency. Below that frequency the capacitor is capacitive. Above that frequency the capacitor is inductive and the lowest attenuation that you can get out of it.

Note that generally the smaller the package size the lower the Lp inductance and smaller the voltage ripple. Two capacitors in parallel will be about half the inductance.
 
There is a lot that was not mentioned in my post but perhaps you could use a few more pointers.

The switching frequency is a bit high at 4MHz. 1-2MHz is typical for small footprint circuits but 4MHz is okay. It is a tradeoff between board area and efficiency with the higher frequency more lossy (higher heat).

Assuming 4MHz and 3.3V output voltage, choose a capacitor voltage rating about double. Standard values are 4V, 6.3V, 10V, 16V and 25V, so choose 6.3V or 10V. At the switching frequency start with a package size of about 0402 (standard sizes: 0201, 0402, 0603, 0805, ...). Pick the highest capacitance at that voltage rating and package size and look to see the series resonant frequency as above. Adjust for cost and availability. The 10 units are common and cheaper (standard capacitance: 10, 22, 47, 100, ...). So 10uF, 0402/0603, 6.3V/10V (X5R) capacitor would probably work well. Lp = 0.3nH plus mounting inductance. Put two down and the effective Lp will be about 0.22nH. This puts Vripple = Vin * 0.22nH/220nH = Vin/1000 (peak-to-peak) = 5mV pp.

Admittedly, I did not open the simulation file. 1/4mV ripple is unusually good. My guess is that the output capacitors do not have a realistic RLC model. That is why the link above to excellent model data on the Murata site which is also free. It also would apply to most other vendor capacitors at the same rating and size.

An additional filter is typical on sensitive circuits such as clocks and PLLs, reference voltages or analog circuits. These will have an additional L/C filter or ferrite bead (10MHz-1GHz). Ferrite beads help if there is high frequency noise on the power supply from the load, adjacent circuits or switcher MOSFET ringing.

A linear regulator bandwidth is limited by the internal op-amp, thus the PSRR mentioned by du00000001 above. Regulator bandwidth is typically less than 1MHz and thus the PSRR is ineffective at the switching frequency. It is helpful to enhance the low frequency PSRR of the switching regulator if there is noise on Vin.
 

Thread Starter

somaye2022

Joined Mar 23, 2022
99
There is a lot that was not mentioned in my post but perhaps you could use a few more pointers.

The switching frequency is a bit high at 4MHz. 1-2MHz is typical for small footprint circuits but 4MHz is okay. It is a tradeoff between board area and efficiency with the higher frequency more lossy (higher heat).

Assuming 4MHz and 3.3V output voltage, choose a capacitor voltage rating about double. Standard values are 4V, 6.3V, 10V, 16V and 25V, so choose 6.3V or 10V. At the switching frequency start with a package size of about 0402 (standard sizes: 0201, 0402, 0603, 0805, ...). Pick the highest capacitance at that voltage rating and package size and look to see the series resonant frequency as above. Adjust for cost and availability. The 10 units are common and cheaper (standard capacitance: 10, 22, 47, 100, ...). So 10uF, 0402/0603, 6.3V/10V (X5R) capacitor would probably work well. Lp = 0.3nH plus mounting inductance. Put two down and the effective Lp will be about 0.22nH. This puts Vripple = Vin * 0.22nH/220nH = Vin/1000 (peak-to-peak) = 5mV pp.

Admittedly, I did not open the simulation file. 1/4mV ripple is unusually good. My guess is that the output capacitors do not have a realistic RLC model. That is why the link above to excellent model data on the Murata site which is also free. It also would apply to most other vendor capacitors at the same rating and size.

An additional filter is typical on sensitive circuits such as clocks and PLLs, reference voltages or analog circuits. These will have an additional L/C filter or ferrite bead (10MHz-1GHz). Ferrite beads help if there is high frequency noise on the power supply from the load, adjacent circuits or switcher MOSFET ringing.

A linear regulator bandwidth is limited by the internal op-amp, thus the PSRR mentioned by du00000001 above. Regulator bandwidth is typically less than 1MHz and thus the PSRR is ineffective at the switching frequency. It is helpful to enhance the low frequency PSRR of the switching regulator if there is noise on Vin.
Thank you very much for your helpfull Anwort.
best regards
Somayeh
 
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