No. The filters immediately after the rectifiers must be LC.
Disconnect the right side of C9 from the net +175V and insert an inductor.
Disconnect the left side of C10 from -175V and insert an inductor.

I don't know what your switching frequency is supposed to be, but 2.2 µF for filtering is minuscule unless it is very high or the inductances are very high (which makes peak current mode control nearly impossible). If you want to "polish" the output, put the high value capacitors right after the rectifiers and the low value after the added inductors. Note that using significant inductance, as opposed to just lossy ferrite beads, will add two more poles to the power path transfer function, which makes achieving adequate phase margin extremely difficult unless the poles are well above the unity gain crossover frequency. There is definite merit to good quality film capacitors for the main filter, but you must consider the ripple due to charge and discharge current. Good film caps will have low ESR so that concern may be greatly reduced.

Could you do a quick sketch sorry to be a pain just want to get a functioning simulation to work from that looks sensible from a current perspective

 

Yes, that should do.

The actual inductance required for your target ripple current will depend on all the things I mentioned previously. The sim will make it easy to play with the values. I typically set a target then consider the inductor design and may move the target to make the inductor easier to make. There are many off-the-shelf inductors to choose from now, so you have a reasonable chance of finding something you can buy instead of having to make it to spec.

 

Yes, that should do.

The actual inductance required for your target ripple current will depend on all the things I mentioned previously. The sim will make it easy to play with the values. I typically set a target then consider the inductor design and may move the target to make the inductor easier to make. There are many off-the-shelf inductors to choose from now, so you have a reasonable chance of finding something you can buy instead of having to make it to spec.

Ok great I have just run it and I am seeing currents near 700A! Not sure what is going on any suggestions?

 

What is your switching frequency?

Try 100 µH or more. If that doesn't help, there may be something else wrong. If you look at the current cycle-by-cycle you should have "ramp on pedestal" - like a rectangular wave, but instead of a flat top a linearly-rising slope between the start and end of each half-cycle.

I'm looking at things on a computer where I can barely see circuit details (my eyes being the problem) so I may have overlooked something.
Be sure your current sense bits are correct. It shouldn't be possible to get current that high. The filter on the sense resistor may have an excessively long time constant, but even that shouldn't allow such huge current.

 

Looks like the centre tap of xfmr secondary goes to wrong common.

 

Yes, that should do.

The actual inductance required for your target ripple current will depend on all the things I mentioned previously. The sim will make it easy to play with the values. I typically set a target then consider the inductor design and may move the target to make the inductor easier to make. There are many off-the-shelf inductors to choose from now, so you have a reasonable chance of finding something you can buy instead of having to make it to spec.

However when I change the FET it reduces any ideas why this happens?

 

Looks like the centre tap of xfmr secondary goes to wrong common.

Yeah I changed that but the same current was there

 

What is your switching frequency?

Try 100 µH or more. If that doesn't help, there may be something else wrong. If you look at the current cycle-by-cycle you should have "ramp on pedestal" - like a rectangular wave, but instead of a flat top a linearly-rising slope between the start and end of each half-cycle.

I'm looking at things on a computer where I can barely see circuit details (my eyes being the problem) so I may have overlooked something.
Be sure your current sense bits are correct. It shouldn't be possible to get current that high. The filter on the sense resistor may have an excessively long time constant, but even that shouldn't allow such huge current.

Yeah I will have a look at the current sense circuit

Kind Regards

Art

 

See

 

You can try to increase the inductance at the output, but watch for the stability.I applied a linear transformer (linear core).This method of mine is no worse than a standard transformer with inductances and a coupling factor.But inductances of windings are considered proceeding from quantity of turns, geometrical sizes and penetrability of the core.
I replaced the transistors with more powerful ones. As a result, the dissipated power of the transistor became equal to 17.5W, which is quite acceptable.

 

Thank you so much to further reduce the current is the trick to increase the inductance at the output then? The FET you picked is rated at 90A I know its pulse rated at 300A but would prefer it if the main drain current rating was higher than the peak currents.

Kind regards

Art

 

I derived the cathode of the maximum drain current of the transistor. The half-width of the pulse is approximately 7.5 ns. This current is capacitive and quite acceptable. In addition, there really will not be such a current, since there are parasitic inductors and inductance of the transformer scattering, these inductors will smear the pulse in time. At the same time, they also cause a surge. So I put the restrictive diodes.

 

The inductance is still too small - operation is in discontinuous mode.
The circuit is unstable - badly so.
You must test with perturbations - the load must be dynamic and the input voltage needs to be fiddled.
Why has the output power been increased - to try to prove this circuit is as bad as the previous one?

 

I took into account the inductance of the dispersion of the windings. The calculation showed the need for a quality transformer. I took the coupling factor k= 0.998.

 

I took into account the inductance of the dispersion of the windings. The calculation showed the need for a quality transformer. I took the coupling factor k= 0.998.
View attachment 149093

with this circuit if I changed the load will the output voltage stay constant? I am currently doing that now, stepping the load from a load load to the full expected load however the voltage is not constant at different loads it changes I will try this now with the new schematic. This is quite important for the system I will be using this on

 

would this be a better transistor to use as well:
https://www.infineon.com/cms/en/pro...et/80v-100v-n-channel-power-mosfet/irfp4368/#

 

The inductance is still too small - operation is in discontinuous mode.
The circuit is unstable - badly so.
You must test with perturbations - the load must be dynamic and the input voltage needs to be fiddled.
Why has the output power been increased - to try to prove this circuit is as bad as the previous one?

with this circuit if I changed the load will the output voltage stay constant? I am currently doing that now, stepping the load from a load load to the full expected load however the voltage is not constant at different loads it changes I will try this now with the new schematic. This is quite important for the system I will be using this on

Is it better to switch a better topology to meet the requirements of this power converter? Kind Regards
Art

 

I took into account the inductance of the dispersion of the windings. The calculation showed the need for a quality transformer. I took the coupling factor k= 0.998.
View attachment 149093

Are the FET's being driven in an efficent way will adding a totem pole have en effect on the switching and also remove the higher currents?

 

I took into account the inductance of the dispersion of the windings. The calculation showed the need for a quality transformer. I took the coupling factor k= 0.998.
View attachment 149093

Do you know what is causing the negative currents at the drain too? Is this just a simulation thing or will something need to be added to remove the negative currents?

 

Is it better to go to the option using the LTC3721 chip? It pretty much looks really similar in performance? Just change the feedback to be similar to the TI chip using an opto.